chick / visualizer
Provides dot visualizations of chisel/firrtl circuites
☆12Updated 6 years ago
Alternatives and similar repositories for visualizer:
Users that are interested in visualizer are comparing it to the libraries listed below
- ☆11Updated 3 years ago
- The RTL source for AnyCore RISC-V☆32Updated 3 years ago
- Chisel wrapper and accelerators for Columbia's Embedded Scalable Platform (ESP)☆24Updated 5 years ago
- ☆20Updated 5 years ago
- RISC-V Rocket Chip Strap-on-Booster with Fused Universal Neural Network (FuNN) eNNgine☆22Updated 3 years ago
- A fault-injection framework using Chisel and FIRRTL☆35Updated 2 years ago
- LIS Network-on-Chip Implementation☆29Updated 8 years ago
- Python library for working Standard Delay Format (SDF) Timing Annotation files.☆29Updated 9 months ago
- The 3rd Iteration of the Berkeley RISC-V DMA Accelerator☆27Updated 5 years ago
- CHIPKIT: An agile, reusable open-source framework for rapid test chip development☆41Updated 4 years ago
- Open source RTL simulation acceleration on commodity hardware☆25Updated 2 years ago
- Implementation of the Advanced Encryption Standard in Chisel☆20Updated 2 years ago
- ☆25Updated this week
- ☆25Updated last year
- A vector processor implemented in Chisel☆21Updated 10 years ago
- ☆13Updated last month
- BFM Tester for Chisel HDL☆14Updated 3 years ago
- Intel Compiler for SystemC☆23Updated last year
- FPU Generator☆20Updated 3 years ago
- Manycore platform Simulation tool for NoC-based platform at a Transactional Level Modeling level☆10Updated 8 years ago
- MIDAS Public Release☆9Updated 6 years ago
- Chisel Cheatsheet☆33Updated 2 years ago
- Implementation of the Snappy compression algorithm as a RoCC accelerator☆11Updated 5 years ago
- DUTH RISC-V Microprocessor☆18Updated 4 months ago
- ☆19Updated last month
- fakeram generator for use by researchers who do not have access to commercial ram generators☆35Updated 2 years ago
- Advanced Debug Interface☆14Updated 2 months ago
- IPs for data-plane integration of Hardware Processing Engines (HWPEs) within a PULP system☆19Updated this week
- Chisel Things for OFDM☆30Updated 4 years ago
- YosysHQ SVA AXI Properties☆37Updated 2 years ago