Chisel Learning Journey
☆109Apr 5, 2023Updated 3 years ago
Alternatives and similar repositories for learning-journey
Users that are interested in learning-journey are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Comment on the rocket-chip source code☆179Oct 19, 2018Updated 7 years ago
- ☆81Feb 27, 2024Updated 2 years ago
- Provides dot visualizations of chisel/firrtl circuits☆123Apr 14, 2023Updated 3 years ago
- 通过issue和README来记录日常学习研究笔记 关注 机器学习系统，深度学习， LLVM，性能剖视， Linux操作系统内核 话题 关注 C/C++. JAVA. Python. Golang. Chisel. 编程语言话题 ( Writing Blogs using …☆78May 24, 2020Updated 6 years ago
- Implementation of the Snappy compression algorithm as a RoCC accelerator☆12Jul 29, 2019Updated 7 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Verilator open-source SystemVerilog simulator and lint system☆43Updated this week
- Dynamically Allocated Neural Network Accelerator for the RISC-V Rocket Microprocessor in Chisel☆223Jan 23, 2020Updated 6 years ago
- DEPRECATED. Please use Chipyard (https://github.com/ucb-bar/chipyard) to build BOOM☆36Oct 23, 2019Updated 6 years ago
- Provides dot visualizations of chisel/firrtl circuites☆13Mar 12, 2019Updated 7 years ago
- Tests for example Rocket Custom Coprocessors☆75Feb 19, 2020Updated 6 years ago
- ☆139May 13, 2022Updated 4 years ago
- Generator Bootcamp Material: Learn Chisel the Right Way☆1,144Sep 10, 2024Updated last year
- Code templates to get started experimenting with the RISC-V LLVM toolchain☆14Nov 25, 2018Updated 7 years ago
- This repo contains source files and code for a synthesizable RISC-V processor with support for custom instructions in a co-processor.☆12Aug 19, 2018Updated 7 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Top-Level Project for Firebox SoC, consisting of Rocket, BOOM, and peripherals (e.g. Ethernet NIC). This is the default target generator …☆56Nov 24, 2019Updated 6 years ago
- ☆20Mar 18, 2022Updated 4 years ago
- Simple MIDAS Examples☆12Nov 25, 2018Updated 7 years ago
- Wrapper for Rocket-Chip on FPGAs☆139Oct 5, 2022Updated 3 years ago
- educational microarchitectures for risc-v isa☆752Sep 1, 2025Updated 10 months ago
- Explore the behavior SystemC kernel event-driven simulator (aka "the engine")☆12Jan 17, 2024Updated 2 years ago
- chisel tutorial exercises and answers☆755Jan 6, 2022Updated 4 years ago
- Chisel components for FPGA projects☆129Sep 19, 2023Updated 2 years ago
- educational microarchitectures for risc-v isa☆68Feb 18, 2019Updated 7 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Hardware-assisted Dynamic Information Flow Tracking for Runtime Protection on RISC-V☆11Oct 16, 2023Updated 2 years ago
- ☆92Jul 15, 2026Updated 2 weeks ago
- Chisel/Firrtl execution engine☆157Aug 21, 2024Updated last year
- An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more☆2,343Updated this week
- A coverage library for Chisel designs☆11Mar 12, 2020Updated 6 years ago
- A prototype GUI for chisel-development☆51Jun 9, 2020Updated 6 years ago
- Layout, rendering ELK Graph generated by easysoc-firrtl, and display the graph as an interactive diagram to represent Chisel generated Fi…☆13Apr 1, 2022Updated 4 years ago
- Rocket Chip Generator☆3,829Jun 2, 2026Updated last month
- Library to compile Chisel circuits using LLVM/MLIR (CIRCT)☆71Mar 2, 2023Updated 3 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- (System)Verilog to Chisel translator☆121May 20, 2022Updated 4 years ago
- Lab exercises for Chisel in the digital electronics 2 course at DTU☆238Jul 3, 2026Updated 3 weeks ago
- A DMA Controller for RISCV CPUs☆13Aug 10, 2015Updated 10 years ago
- Common RTL blocks used in SiFive's projects☆193May 13, 2022Updated 4 years ago
- Chisel Things for OFDM☆33Jul 1, 2020Updated 6 years ago
- ☆13Feb 13, 2021Updated 5 years ago
- Simple RISC-V 3-stage Pipeline in Chisel☆619Aug 9, 2024Updated last year