Intensivate / learning-journey
Chisel Learning Journey
☆107Updated last year
Related projects ⓘ
Alternatives and complementary repositories for learning-journey
- A Style Guide for the Chisel Hardware Construction Language☆106Updated 3 years ago
- A dynamic verification library for Chisel.☆142Updated last week
- ☆75Updated 2 years ago
- Examples for creating AXI-interfaced peripherals in Chisel☆71Updated 9 years ago
- Tests for example Rocket Custom Coprocessors☆69Updated 4 years ago
- CVA6 SDK containing RISC-V tools and Buildroot☆62Updated 4 months ago
- Provides dot visualizations of chisel/firrtl circuits☆115Updated last year
- Provides various testers for chisel users☆100Updated last year
- A Chisel RTL generator for network-on-chip interconnects☆177Updated this week
- educational microarchitectures for risc-v isa☆65Updated 5 years ago
- Wrapper for Rocket-Chip on FPGAs☆125Updated 2 years ago
- Comment on the rocket-chip source code☆168Updated 6 years ago
- RISC-V Torture Test☆167Updated 4 months ago
- RISC-V Formal Verification Framework☆111Updated last month
- (System)Verilog to Chisel translator☆106Updated 2 years ago
- Chisel components for FPGA projects☆119Updated last year
- Lab exercises for Chisel in the digital electronics 2 course at DTU☆176Updated 2 weeks ago
- Setup scripts and files needed to compile CoreMark on RISC-V☆64Updated 4 months ago
- RISC-V Core; superscalar, out-of-order, multi-core capable; based on RISCY-OOO from MIT☆161Updated 3 months ago
- Documentation for RISC-V Spike☆96Updated 6 years ago
- ☆161Updated 11 months ago
- Microarchitecture implementation of the decoupled vector-fetch accelerator☆148Updated 9 months ago
- Software tools that support rocket-chip (GNU toolchain, ISA simulator, tests)☆52Updated last year
- A Fast, Low-Overhead On-chip Network☆137Updated 3 weeks ago
- SSRV(Super-Scalar RISC-V) --- Super-scalar out-of-order RV32IMC CPU core, 6.4 CoreMark/MHz.☆199Updated 4 years ago
- Chisel examples and code snippets☆232Updated 2 years ago
- Verilog Configurable Cache☆167Updated 2 months ago
- Port fpga-zynq (rocket-chip) to Xilinx ZYNQ Ultrascale+ board (ZCU102)☆57Updated last year
- Open source high performance IEEE-754 floating unit☆60Updated 8 months ago
- Like VexRiscv, but, Harder, Better, Faster, Stronger☆108Updated this week