Alternatives and similar repositories for chisel3-axi

Users that are interested in chisel3-axi are comparing it to the libraries listed below

• sequencer / arithmetic
  ☆33Updated 3 months ago
• freechipsproject / chisel-cheatsheet
  Chisel Cheatsheet
  ☆33Updated 2 years ago
• freechipsproject / ip-contributions
  For contributions of Chisel IP to the chisel community.
  ☆62Updated 7 months ago
• anycore / anycore-riscv-src
  The RTL source for AnyCore RISC-V
  ☆32Updated 3 years ago
• dai-pch / FSM
  A Zero Cost Abstruction of FSM(Finite State Machine) circuits based on chisel3.
  ☆13Updated 3 years ago
• jiegec / rocket-chip-vcu128
  Run Rocket Chip on VCU128
  ☆30Updated 6 months ago
• chipsalliance / chisel-interface
  The 'missing header' for Chisel
  ☆20Updated 3 months ago
• yamak / axi-nodes
  ☆19Updated 3 years ago
• schoeberl / chisel-empty
  An almost empty chisel project as a starting point for hardware design
  ☆31Updated 4 months ago
• rhit-neuro / deca
  ☆22Updated 4 years ago
• maltanar / axi-in-chisel
  Examples for creating AXI-interfaced peripherals in Chisel
  ☆76Updated 9 years ago
• ljwljwljwljw / DiplomaticBackend
  ☆17Updated 3 years ago
• chipsalliance / espresso
  ☆40Updated 2 weeks ago
• msyksphinz-self / riscv-vector-tests
  Original test vector of RISC-V Vector Extension
  ☆12Updated 4 years ago
• oscc-ip / sdram
  An open source SDR SDRAM controller based on the AXI4 bus and verified by FPGA and tapeout. It can support memory particles of different …
  ☆18Updated last month
• easysoc / layered-firrtl
  This repository is outdated and the related functionality has been migrated to https://github.com/easysoc/easysoc-firrtl
  ☆11Updated 3 years ago
• CMU-SAFARI / Pythia-HDL
  Implementation of Pythia: A Customizable Hardware Prefetching Framework Using Online Reinforcement Learning in Chisel HDL. To know more, …
  ☆14Updated 3 years ago
• pku-liang / ksim
  ☆41Updated 5 months ago
• ucb-art / fft
  ☆20Updated 5 years ago
• j-marjanovic / chisel-bfm-tester
  BFM Tester for Chisel HDL
  ☆14Updated 3 years ago
• msyksphinz-self / chisel-soc
  ☆9Updated 4 years ago
• ucb-bar / chisel-gui
  A prototype GUI for chisel-development
  ☆52Updated 5 years ago
• pulp-platform / axi_llc
  ☆30Updated 2 months ago
• CherrySprings / CherrySprings
  ☆18Updated 2 years ago
• chipsalliance / rocket-chip-inclusive-cache
  An RTL generator for a last-level shared inclusive TileLink cache controller
  ☆19Updated 5 months ago
• esa-tu-darmstadt / SCAIE-V
  An Open-Source SCAlable Interface for ISA Extensionsfor RISC-V Processors. New Version:
  ☆16Updated last year
• jiegec / fpu-wrappers
  Wrappers for open source FPU hardware implementations.
  ☆32Updated last year
• chick / visualizer
  Provides dot visualizations of chisel/firrtl circuites
  ☆12Updated 6 years ago
• IBM / rocc-software
  C/Assembly macros for talking with Rocket Custom Coprocessors (RoCCs)
  ☆54Updated 4 years ago
• nju-mips / noop-lo
  A simple OoO processor developed by njuallen and wierton, it won 2nd prize in LoongsonCup18.
  ☆28Updated 5 years ago