firesim / FireMarshal
Software workload management tool for RISC-V based SoC research. This is the default workload management tool for Chipyard and FireSim.
☆79Updated 2 months ago
Alternatives and similar repositories for FireMarshal:
Users that are interested in FireMarshal are comparing it to the libraries listed below
- ☆82Updated last week
- Next generation CGRA generator☆109Updated this week
- Chisel/Firrtl execution engine☆154Updated 6 months ago
- Heterogeneous Research Platform (HERO) for exploration of heterogeneous computers consisting of programmable many-core accelerators and a…☆99Updated last year
- ☆77Updated 2 years ago
- Library to compile Chisel circuits using LLVM/MLIR (CIRCT)☆71Updated last year
- Provides dot visualizations of chisel/firrtl circuits☆120Updated last year
- Provides various testers for chisel users☆101Updated 2 years ago
- ☆133Updated 2 years ago
- RiscyOO: RISC-V Out-of-Order Processor☆154Updated 4 years ago
- Tests for example Rocket Custom Coprocessors☆69Updated 5 years ago
- AXI Adapter(s) for RISC-V Atomic Operations☆60Updated 5 months ago
- RISC-V Core; superscalar, out-of-order, multi-core capable; based on RISCY-OOO from MIT☆166Updated 6 months ago
- ☆33Updated 7 months ago
- Microarchitecture implementation of the decoupled vector-fetch accelerator☆149Updated last year
- upstream: https://github.com/RALC88/gem5☆31Updated last year
- Fork of seldridge/rocket-rocc-examples with tests for a systolic array based matmul accelerator☆55Updated this week
- A 32-bit RISC-V Processor Designed with High-Level Synthesis☆52Updated 5 years ago
- The multi-core cluster of a PULP system.☆70Updated this week
- IOMMU IP compliant with the RISC-V IOMMU Specification v1.0☆84Updated this week
- pulp_soc is the core building component of PULP based SoCs☆79Updated 2 weeks ago
- Spatz is a compact RISC-V-based vector processor meant for high-performance, small computing clusters.☆90Updated this week
- FPGA-Accelerated Simulation Framework Automatically Transforming Arbitrary RTL☆99Updated 5 years ago
- Top-Level Project for Firebox SoC, consisting of Rocket, BOOM, and peripherals (e.g. Ethernet NIC). This is the default target generator …☆56Updated 5 years ago
- ☆78Updated 11 months ago
- A modular, parametrizable, and highly flexible Data Movement Accelerator (DMA)☆118Updated this week
- Wrapper for Rocket-Chip on FPGAs☆129Updated 2 years ago
- ☆84Updated 2 years ago
- Chisel RISC-V Vector 1.0 Implementation☆78Updated last week
- CVA6 SDK containing RISC-V tools and Buildroot☆61Updated 7 months ago