A PULP SoC for education, easy to understand and extend with a full flow for a physical design.
☆219Mar 25, 2026Updated 2 weeks ago
Alternatives and similar repositories for croc
Users that are interested in croc are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- An Open-Source Toolchain for Top-Metal IC Art and Ultra-High-Fidelity GDSII Renders☆23Jan 6, 2026Updated 3 months ago
- whatever it means☆16Apr 1, 2026Updated last week
- A modular, parametrizable, and highly flexible Data Movement Accelerator (DMA)☆202Mar 6, 2026Updated last month
- A minimal Linux-capable 64-bit RISC-V SoC built around CVA6☆325Apr 2, 2026Updated last week
- ☆59Mar 31, 2025Updated last year
- End-to-end encrypted cloud storage - Proton Drive • AdSpecial offer: 40% Off Yearly / 80% Off First Month. Protect your most important files, photos, and documents from prying eyes.
- Greyhound on IHP SG13G2 0.13 μm BiCMOS process☆87Jan 28, 2026Updated 2 months ago
- IIC-OSIC-TOOLS is an all-in-one Docker image for SKY130/GF180/IHP130-based analog and digital chip design. AMD64 and ARM64 are natively s…☆810Updated this week
- 130nm BiCMOS Open Source PDK, dedicated for Analog, Mixed Signal and RF Design. Documentation is here:☆704Apr 2, 2026Updated last week
- ☆34Feb 17, 2026Updated last month
- Yosys plugin for logic locking and supply-chain security☆23Apr 5, 2025Updated last year
- A reliable, real-time subsystem for the Carfield SoC☆20Dec 2, 2025Updated 4 months ago
- SystemVerilog file list pruner☆18Mar 2, 2026Updated last month
- Spatz is a compact RISC-V-based vector processor meant for high-performance, small computing clusters.☆143Updated this week
- 55nm CMOS Open Source PDK by ICsprout Integrated Circuit Co., Ltd.☆193Updated this week
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- Open-source PDK version manager☆43Nov 25, 2025Updated 4 months ago
- Introduction to Chip Design☆52Mar 25, 2026Updated 2 weeks ago
- ASIC implementation flow infrastructure, successor to OpenLane☆355Updated this week
- RTL sources of the High-Performance L1 Dcache (HPDcache) for OpenHW CV cores☆102Mar 19, 2026Updated 3 weeks ago
- SystemVerilog frontend for Yosys☆211Apr 2, 2026Updated last week
- A dependency management tool for hardware projects.☆360Apr 2, 2026Updated last week
- SystemVerilog IPs and Modules for architectural redundancy designs.☆19Nov 12, 2025Updated 4 months ago
- ☆25Mar 31, 2026Updated last week
- Open-source implementations of reference Physical True Random Number Generators (TRNG or PTRNG) based on ring oscillators.☆16Mar 26, 2026Updated 2 weeks ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting with the flexibility to host WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Cloudways by DigitalOcean.
- Self-contained RTL to GDS flow for simple chip designs☆66Mar 30, 2026Updated last week
- ☆19Oct 7, 2025Updated 6 months ago
- The multi-core cluster of a PULP system.☆113Mar 28, 2026Updated last week
- BaseJump STL: A Standard Template Library for SystemVerilog☆657Apr 3, 2026Updated last week
- The CORE-V CVA5 is an Application class 5-stage RISC-V CPU specifically targetting FPGA implementations.☆129Jul 11, 2025Updated 8 months ago
- Tiny Tapeout GDS Action (using OpenLane)☆21Mar 25, 2026Updated 2 weeks ago
- The next generation of OpenLane, rewritten from scratch with a modular architecture☆340Dec 2, 2025Updated 4 months ago
- Common SystemVerilog components☆727Mar 31, 2026Updated last week
- A mixed-criticality platform built around Cheshire, with a number of safety/security and predictability features. Ready-to-use FPGA flow …☆126Apr 1, 2026Updated last week
- NordVPN Threat Protection Pro™ • AdTake your cybersecurity to the next level. Block phishing, malware, trackers, and ads. Lightweight app that works with all browsers.
- This repository contains all the information included in the beginner SoC/physical design using open-source EDA tools organized by VLSI S…☆13Mar 7, 2021Updated 5 years ago
- Simple UVM environment for experimenting with Verilator.☆38Mar 23, 2026Updated 2 weeks ago
- A Fast, Low-Overhead On-chip Network☆277Apr 2, 2026Updated last week
- Library of open source PDKs☆71Mar 30, 2026Updated last week
- Generic Register Interface (contains various adapters)☆138Feb 24, 2026Updated last month
- High speed C/C++ based behavioural VHDL/Verilog co-simulation memory model☆27Feb 2, 2026Updated 2 months ago
- A current mode buck converter on the SKY130 PDK☆36Jun 17, 2021Updated 4 years ago