pulp-platform / ELAULinks
☆20Updated last year
Alternatives and similar repositories for ELAU
Users that are interested in ELAU are comparing it to the libraries listed below
Sorting:
- A tool that converts SystemVerilog to Verilog. Uses Design Compiler, so it is 100% compatible.☆44Updated 2 years ago
- CMake based hardware build system☆35Updated last week
- A configurable SRAM generator☆56Updated 4 months ago
- ☆33Updated 11 months ago
- An open source PDK using TIGFET 10nm devices.☆53Updated 3 years ago
- Runtime-First FPGA Interchange Routing Contest @ FPGA’24☆34Updated 6 months ago
- Workshop on Open-Source EDA Technology (WOSET)☆48Updated last year
- SMT-based Simultaneous Place-&-Route for Standard Cell Synthesis for PROBE 2.0☆18Updated 5 years ago
- KLayout technology files for ASAP7 FinFET educational process☆23Updated 2 years ago
- fakeram generator for use by researchers who do not have access to commercial ram generators☆38Updated 2 years ago
- Proposed RISC-V Composable Custom Extensions Specification☆70Updated 5 months ago
- Open source process design kit for 28nm open process☆69Updated last year
- A library and command-line tool for querying a Verilog netlist.☆29Updated 3 years ago
- tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles☆36Updated 2 years ago
- CHIPKIT: An agile, reusable open-source framework for rapid test chip development☆42Updated 5 years ago
- An automatic clock gating utility☆51Updated 8 months ago
- An Approximate Logic Synthesis Framework based on Boolean Matrix Factorization☆32Updated 2 years ago
- Source codes and calibration scripts for clock tree synthesis☆40Updated 5 years ago
- YosysHQ SVA AXI Properties☆43Updated 2 years ago
- AutoSVA is a tool to automatically generate formal testbenches for unit-level RTL verification. The goal is to, based on annotations made…☆96Updated last year
- Library of open source Process Design Kits (PDKs)☆61Updated last week
- DATC Robust Design Flow.☆36Updated 5 years ago
- ☆38Updated 3 years ago
- ASIC Design kit for Skywater 130 for use with mflowgen☆13Updated 2 years ago
- Open source RTL simulation acceleration on commodity hardware☆33Updated 2 years ago
- ☆44Updated 5 years ago
- OpenDesign Flow Database☆17Updated 7 years ago
- ☆19Updated last year
- AMC: Asynchronous Memory Compiler☆51Updated 5 years ago
- SRAM☆22Updated 5 years ago