Verilog HDL implementation of SDRAM controller and SDRAM model
☆50Jun 19, 2024Updated 2 years ago
Alternatives and similar repositories for SDRAM_Verilog
Users that are interested in SDRAM_Verilog are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Motion Estimation implementation by using Verilog HDL☆13Jun 17, 2024Updated 2 years ago
- Verilog SDRAM memory controller☆382May 13, 2017Updated 9 years ago
- USB Full Speed PHY☆49May 3, 2020Updated 6 years ago
- Repository containing ULX3S blink LED binaries☆14May 16, 2022Updated 4 years ago
- Zucker SOC☆17Jun 11, 2025Updated last year
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Superscalar Out-of-Order NPU Design on FPGA☆17May 17, 2024Updated 2 years ago
- Trying to learn Wishbone by implementing few master/slave devices☆13Jan 7, 2019Updated 7 years ago
- ☆13Nov 5, 2017Updated 8 years ago
- This repository contains C++ implementation of A* search algorithm for finding path to goal state for 8 puzzle problem in AI.☆11Dec 2, 2023Updated 2 years ago
- Generic FPGA SDRAM controller, originally made for AS4C4M16SA☆86Sep 7, 2020Updated 6 years ago
- ☆10Apr 8, 2021Updated 5 years ago
- Opensource DDR3 Controller☆481Sep 12, 2026Updated last week
- The CORE-V CVA5 is an Application class 5-stage RISC-V CPU specifically targetting FPGA implementations.☆139Jul 11, 2025Updated last year
- An FPGA-based DDR1 controller. 基于FPGA的DDR1控制器，为低端FPGA嵌入式系统提供廉价、大容量的存储。☆223Sep 15, 2023Updated 3 years ago
- Proton VPN Special Offer - Get 70% off • AdSpecial partner offer. Trusted by over 100 million users worldwide. Tested, Approved and Recommended by Experts.
- RISCV CPU implementation in SystemVerilog☆32Aug 28, 2026Updated 3 weeks ago
- ☆20Aug 2, 2025Updated last year
- A DDR3 memory controller in Verilog for various FPGAs☆632Oct 10, 2021Updated 4 years ago
- A tiny FABulous FPGA for TTIHP26a☆15Apr 9, 2026Updated 5 months ago
- Repository of files associated with the webinar on analog layout using magic and klayout with Matt Venn.☆17Apr 13, 2023Updated 3 years ago
- Demo board for TT04 and beyond☆37Aug 29, 2026Updated 3 weeks ago
- Hardware Division Units☆10Jul 17, 2014Updated 12 years ago
- Small footprint and configurable DRAM core☆548Updated this week
- SystemC to Verilog Synthesizable Subset Translator☆12May 12, 2023Updated 3 years ago
- Simple, predictable pricing with DigitalOcean hosting • AdAlways know what you'll pay with monthly caps and flat pricing. Enterprise-grade infrastructure trusted by 600k+ customers.
- TensorCore Vector Processor for Deep Learning - Google Summer of Code Project☆27Aug 23, 2021Updated 5 years ago
- Linux capable RISC-V SoC designed to be readable and useful.☆164Dec 19, 2025Updated 9 months ago
- APB4 Multiplexor☆15May 10, 2024Updated 2 years ago
- ☆36Mar 8, 2023Updated 3 years ago
- ☆11Jan 20, 2019Updated 7 years ago
- Drawio => VHDL and Verilog☆62Oct 15, 2023Updated 2 years ago
- Matrix Multiply and Accumulate unit written in System Verilog☆15Feb 7, 2019Updated 7 years ago
- Sipeed Tang Nano: Fully Opensource Toolchain for FPGA Synthesis, Place & Route, Simulation and Download/Flash.☆17Jul 26, 2024Updated 2 years ago
- SystemVerilog implementation of the AHB to TileLink UL (Uncached Lightweight) bridge☆15Sep 9, 2022Updated 4 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- RISCV core RV32I/E.4 threads in a ring architecture☆34Jun 12, 2023Updated 3 years ago
- Structured UVM Course☆77Jan 4, 2024Updated 2 years ago
- A tiny FP8 multiplication unit written in Verilog. TinyTapeout 2 submission.☆14Nov 23, 2022Updated 3 years ago
- Verilog UART☆203Jun 4, 2013Updated 13 years ago
- ☆58Jun 19, 2021Updated 5 years ago
- FPGA250 aboard the eFabless Caravel☆34Dec 22, 2020Updated 5 years ago
- Basic USB 1.1 Host Controller for small FPGAs☆104Jun 6, 2020Updated 6 years ago