Alternatives and similar repositories for UberDDR3

Users that are interested in UberDDR3 are comparing it to the libraries listed below

• ultraembedded / core_ddr3_controller
  A DDR3 memory controller in Verilog for various FPGAs
  ☆497Updated 3 years ago
• fpganinja / taxi
  AXI, AXI stream, Ethernet, and PCIe components in System Verilog
  ☆328Updated last month
• ZipCPU / sdspi
  SD-Card controller, using either SPI, SDIO, or eMMC interfaces
  ☆304Updated 3 months ago
• dpretet / async_fifo
  A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog
  ☆359Updated last year
• ZipCPU / wb2axip
  Bus bridges and other odds and ends
  ☆576Updated 3 months ago
• jamieiles / uart
  Verilog UART
  ☆177Updated 12 years ago
• ZipCPU / wbuart32
  A simple, basic, formally verified UART controller
  ☆307Updated last year
• efabless / raven-picorv32
  Silicon-validated SoC implementation of the PicoSoc/PicoRV32
  ☆272Updated 5 years ago
• klyone / opencores-ip
  A huge collection of VHDL/Verilog open-source IP cores scraped from the web
  ☆107Updated 9 years ago
• avakar / usbcorev
  A full-speed device-side USB peripheral core written in Verilog.
  ☆233Updated 2 years ago
• stffrdhrn / sdram-controller
  Verilog SDRAM memory controller
  ☆337Updated 8 years ago
• alexforencich / cocotbext-axi
  AXI interface modules for Cocotb
  ☆276Updated last year
• ben-marshall / uart
  A simple implementation of a UART modem in Verilog.
  ☆148Updated 3 years ago
• pulp-platform / common_cells
  Common SystemVerilog components
  ☆642Updated last week
• alexforencich / verilog-uart
  Verilog UART
  ☆497Updated 5 months ago
• nandland / spi-slave
  SPI Slave for FPGA in Verilog and VHDL
  ☆207Updated last year
• ultraembedded / core_jpeg
  High throughput JPEG decoder in Verilog for FPGA
  ☆235Updated 3 years ago
• zachjs / sv2v
  SystemVerilog to Verilog conversion
  ☆653Updated last month
• nandland / spi-master
  SPI Master for FPGA - VHDL and Verilog
  ☆297Updated last year
• ultraembedded / riscv_soc
  Basic RISC-V Test SoC
  ☆138Updated 6 years ago
• hdl-modules / hdl-modules
  A collection of reusable, high-quality, peer-reviewed VHDL building blocks.
  ☆174Updated 3 weeks ago
• openhwgroup / cvfpu
  Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.
  ☆516Updated 5 months ago
• enjoy-digital / litedram
  Small footprint and configurable DRAM core
  ☆431Updated last month
• alexforencich / verilog-lfsr
  Fully parametrizable combinatorial parallel LFSR/CRC module
  ☆152Updated 5 months ago
• alexforencich / verilog-dsp
  Verilog digital signal processing components
  ☆146Updated 2 years ago
• slaclab / surf
  A huge VHDL library for FPGA and digital ASIC development
  ☆393Updated last week
• ultraembedded / FPGAmp
  720p FPGA Media Player (RISC-V + Motion JPEG + SD + HDMI on an Artix 7)
  ☆281Updated 4 years ago
• lowRISC / style-guides
  lowRISC Style Guides
  ☆445Updated last month
• risclite / SuperScalar-RISCV-CPU
  SSRV(Super-Scalar RISC-V) --- Super-scalar out-of-order RV32IMC CPU core, 6.4 CoreMark/MHz.
  ☆218Updated 4 years ago
• chipsalliance / VeeRwolf
  FuseSoC-based SoC for VeeR EH1 and EL2
  ☆321Updated 7 months ago