mole99 / greyhound-ihpLinks
Greyhound on IHP SG13G2 0.13 μm BiCMOS process
☆38Updated 3 weeks ago
Alternatives and similar repositories for greyhound-ihp
Users that are interested in greyhound-ihp are comparing it to the libraries listed below
Sorting:
- ☆69Updated 9 months ago
- A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.☆93Updated 8 months ago
- Spicing up the first and (no longer) the only EU FPGA chip with a flashy new board, loaded with a suite of engaging demos and examples =>…☆62Updated last week
- A reconfigurable logic circuit made of identical rotatable tiles.☆21Updated 3 years ago
- SAR ADC on tiny tapeout☆39Updated 4 months ago
- Flip flop setup, hold & metastability explorer tool☆34Updated 2 years ago
- The ILA allows you to perform in-system debugging of your designs on the GateMate FPGA at runtime. All signals of your design inside the …☆51Updated last week
- LunaPnR is a place and router for integrated circuits☆46Updated 6 months ago
- A pipelined RISC-V processor☆57Updated last year
- ☆35Updated 6 months ago
- an inverter drawn in magic with makefile to simulate☆26Updated 2 years ago
- ☆39Updated 2 years ago
- RISC-V Processor written in Amaranth HDL☆37Updated 3 years ago
- Experimental flows using nextpnr for Xilinx devices☆47Updated this week
- RISC-V SoC Physical Implementation in 180 nm CMOS with a Quark Core Based on FemtoRV32☆45Updated last year
- ☆52Updated 3 months ago
- A padring generator for ASICs☆25Updated 2 years ago
- ☆46Updated 3 months ago
- System on Chip toolkit for Amaranth HDL☆90Updated 7 months ago
- Reusable Verilog 2005 components for FPGA designs☆43Updated 3 months ago
- ☆33Updated 2 years ago
- tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles☆36Updated 2 years ago
- Bitstream relocation and manipulation tool.☆45Updated 2 years ago
- ☆36Updated 2 years ago
- FPGA250 aboard the eFabless Caravel☆29Updated 4 years ago
- A Risc-V SoC for Tiny Tapeout☆17Updated 2 months ago
- An automatic clock gating utility☆47Updated last month
- Gate-level visualization generator for SKY130-based chip designs.☆19Updated 3 years ago
- RISC-V Nox core☆62Updated 2 months ago
- https://caravel-mgmt-soc-litex.readthedocs.io/en/latest/☆27Updated 4 months ago