peilin-chen / Zhulong-RISCV-CPULinks
CPU Design Based on RISCV ISA
☆122Updated last year
Alternatives and similar repositories for Zhulong-RISCV-CPU
Users that are interested in Zhulong-RISCV-CPU are comparing it to the libraries listed below
Sorting:
- AXI协议规范中文翻译版☆164Updated 3 years ago
- AXI总线连接器☆104Updated 5 years ago
- A 16-bit by 16-bit signed binary multiplier based on the Radix-4 Booth algorithm and Wallace Tree reduction☆59Updated last year
- upgrade to e203 (a risc-v core)☆45Updated 5 years ago
- ☆198Updated 4 months ago
- Final Project of Software_Hardware_Co-Design_24Spring. FPGA-based RISC-V+ Convolutional Acceleration Unit.☆22Updated last year
- 包含了SOC设计中的通用IP,如外设、总线结构、基础、验证等☆119Updated 2 weeks ago
- Collect some IC textbooks for learning.☆167Updated 3 years ago
- 2023集创赛国二。基于脉动阵列写的一个简单的卷积层加速器,支持yolov3-tiny的第一层卷积层计算,可根据FPGA端DSP资源灵活调整脉动阵列的结构以实现不同的计算效率。☆202Updated last week
- 我的数字IC厂库:Verilog HDL; System Vreilog; UVM; ModelSim; Quartus II;☆100Updated 3 years ago
- 在FPGA上面实现一个NPU计算单元。能够执行矩阵运算(ADD/ADDi/ADDs/MULT/MULTi/DOT等)、图像处理运算(CONV/POOL等)、非线性映射(RELU/TANH/SIGM等)。☆265Updated 7 years ago
- An AXI4 crossbar implementation in SystemVerilog☆176Updated last month
- AXI DMA 32 / 64 bits☆121Updated 11 years ago
- ☆69Updated 9 years ago
- AMBA bus generator including AXI4, AXI3, AHB, and APB☆224Updated 2 years ago
- achieve softmax in PYNQ with heterogeneous computing.☆66Updated 6 years ago
- Mirror of william_william/uvm-mcdf on Gitee☆28Updated 2 years ago
- 清華大學 | 積體電路設計實驗 (IC LAB) | 110上☆45Updated 3 years ago
- verilog实现TPU中的脉动阵列计算卷积的module☆134Updated 5 months ago
- ☆42Updated 4 years ago
- IC Verification & SV Demo☆54Updated 4 years ago
- IC implementation of Systolic Array for TPU☆285Updated last year
- ☆88Updated 3 weeks ago
- Convolutional accelerator kernel, target ASIC & FPGA☆230Updated 2 years ago
- 数字IC秋招项目、手撕代码☆38Updated last year
- AMBA v.3 APB v.1 Specification Complaint Slave SRAM Core design and testbench. The testbench is developed using System Verilog and UVM an…☆182Updated 7 years ago
- ☆73Updated last month
- ☆149Updated this week
- a training-target implementation of rv32im, designed to be simple and easy to understand☆61Updated 3 years ago
- ☆70Updated 2 years ago