An open-source hybrid Mesh–Crossbar NoC for scalable, low-latency shared-L1-memory clusters with thousands of cores.
☆37May 14, 2026Updated last week
Alternatives and similar repositories for TeraNoC
Users that are interested in TeraNoC are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- OpenExSys_CoherentCache a directory-based MESI protocol coherent cache IP.☆22Mar 25, 2025Updated last year
- OpenExSys_NoC a mesh-based network on chip IP.☆20Dec 1, 2023Updated 2 years ago
- Reconfigurable Binary Engine☆17Mar 23, 2021Updated 5 years ago
- CORE-V MCU UVM Environment and Test Bench☆26Jul 19, 2024Updated last year
- ☆18Jul 3, 2025Updated 10 months ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- 简洁的测试平台日志,波形(FSDB/VCD),根因分析MCP Server. A Simple and Universal MCP Server to Debug Testbench Simulation Failures Via Log Parsing And Wave…☆39May 13, 2026Updated last week
- Gem5 with PCI Express integrated.☆23Sep 29, 2018Updated 7 years ago
- A Fast, Low-Overhead On-chip Network☆294May 12, 2026Updated last week
- PULP C910, a superscalar out-of-order RISC-V core adapted from T-Head's openC910 (Alibaba Group) and integrated into the PULP ecosystem w…☆18May 5, 2026Updated 2 weeks ago
- ☆39Updated this week
- Linux on RISC-V on FPGA (LOROF): RV64GC Sv39 Quad-Core Superscalar Out-of-Order Virtual Memory CPU☆17Feb 23, 2026Updated 2 months ago
- Synthesis using Synopsys DC and Physical Design flow using Synopsys ICC II, of my RISC-V 5 stage pipelined using 32 nm tech repo☆15Jul 31, 2024Updated last year
- Open-source AMBA CHI infrastructures (supporting Issue B, E.b)☆39Updated this week
- Implementation of post-process coverage, and batch waveform search☆18Aug 29, 2021Updated 4 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Projects for the ECPiX-5 - a ECP5 FPGA board.☆14Jul 5, 2020Updated 5 years ago
- A lightweight core for the CV32E40 implementing the RISC-V vector extension specification. (v0.8)☆35Jan 19, 2021Updated 5 years ago
- ☆23Jun 26, 2025Updated 10 months ago
- Neural Engine, 16 input channels☆16Oct 31, 2022Updated 3 years ago
- HiKoB OpenLab drivers and applications source code☆17Jun 13, 2016Updated 9 years ago
- NoC simulation using gem5 (a simple tul)☆14Mar 23, 2024Updated 2 years ago
- 南京大学计算机系2024春季学期数字逻辑与计算机组成课程实验☆23Jun 25, 2024Updated last year
- YSYX RISC-V Project NJU Study Group☆16Jan 3, 2025Updated last year
- Verilog code for a low power RFID chip that will communicate with I2C sensors.☆13Apr 18, 2014Updated 12 years ago
- Serverless GPU API endpoints on Runpod - Get Bonus Credits • AdSkip the infrastructure headaches. Auto-scaling, pay-as-you-go, no-ops approach lets you focus on innovating your application.
- ☆14Oct 11, 2024Updated last year
- Stencil with Optimized Dataflow Architecture☆18Feb 27, 2024Updated 2 years ago
- whatever it means☆16Apr 1, 2026Updated last month
- ☆233Jun 25, 2025Updated 10 months ago
- UVM components for DSP tasks (MODulation/DEModulation)☆16Mar 2, 2022Updated 4 years ago
- ☆37Dec 10, 2023Updated 2 years ago
- Netrace: a network packet trace reader☆14Jun 16, 2014Updated 11 years ago
- matrix-coprocessor for RISC-V☆32Feb 27, 2026Updated 2 months ago
- Vmodel toolbox repository☆15Mar 25, 2016Updated 10 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- A Hardware MD5 Cracker for the Cyclone V SoC☆12Mar 25, 2015Updated 11 years ago
- ☆15May 6, 2026Updated 2 weeks ago
- (Not actively updating)Vision Transformer Accelerator implemented in Vivado HLS for Xilinx FPGAs.☆20Dec 29, 2024Updated last year
- A linux PCIe driver for Altera☆11Oct 9, 2018Updated 7 years ago
- NVIDIA CPU microcode☆13Mar 10, 2015Updated 11 years ago
- ☆30Aug 4, 2025Updated 9 months ago
- Xilinx IP repository☆13May 5, 2018Updated 8 years ago