NUDT 高级体系结构实验
☆33Sep 21, 2024Updated last year
Alternatives and similar repositories for archlab
Users that are interested in archlab are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- An exquisite superscalar RV32GC processor.☆167May 12, 2026Updated 2 months ago
- Build an open source, extremely simple DMA.☆25Feb 17, 2019Updated 7 years ago
- Alpha64 R10000 Two-Way Superscalar Processor☆12May 6, 2019Updated 7 years ago
- 给NEMU移植Linux Kernel!☆23Jun 1, 2025Updated last year
- Open Source SSD Controller. NVMe and Lightstor variants☆17May 21, 2014Updated 12 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- Lab material for the three week course on builiding a RISC-V microprocessor☆21Jan 14, 2026Updated 6 months ago
- Contains the code for the Flexus cycle-accurate simulator, used in QFlex.☆14Jul 14, 2026Updated last week
- HeliosXCore is a Superscalar Out-of-order RISC-V Processor Core.☆10Mar 8, 2024Updated 2 years ago
- ☆97Nov 12, 2025Updated 8 months ago
- The MiniDecaf test cases.☆18May 15, 2025Updated last year
- Simulator for a superscalar processor with dynamic scheduling and branch prediction☆16Nov 23, 2018Updated 7 years ago
- Raspberry Pi Pico USB speed check☆17Jul 28, 2022Updated 3 years ago
- Pipelined 64-bit RISC-V core☆17Mar 7, 2024Updated 2 years ago
- ☆11Apr 27, 2023Updated 3 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- Single Cycle and Pipeline CPU of RISC-V Architecture designed for Digital Design and Computer Organization Experiments 2021, NJU☆14Jan 17, 2022Updated 4 years ago
- Basic chisel difftest environment for RTL design (WIP☆21Mar 8, 2025Updated last year
- This repository contains getting started projects related to all PSoC4 pioneer kits.☆15Jul 9, 2026Updated 2 weeks ago
- https://caravel-user-project.readthedocs.io☆18Mar 29, 2022Updated 4 years ago
- This repository provides examples that demonstrates how to develop PSoC 4 MCU based analog designs. These examples help you to use periph…☆15Jul 9, 2026Updated 2 weeks ago
- Compiler development environment.☆21Apr 9, 2026Updated 3 months ago
- A terminal text editor written in MoonBit☆10Apr 7, 2025Updated last year
- A 2-Way Super-Scalar OoO RISC-V Core Based on Intel P6 Microarchitecture.☆17Sep 27, 2022Updated 3 years ago
- ☆12Mar 20, 2025Updated last year
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- "aura" my super-scalar O3 cpu core☆26May 25, 2024Updated 2 years ago
- ☆22Nov 3, 2025Updated 8 months ago
- CPU Design Based on RISCV ISA☆141Jun 14, 2024Updated 2 years ago
- This is the repo of "RR-Compound: RDMA-Fused gRPC for Low Latency and High Throughput With an Easy Interface" published in TPDS☆29Mar 12, 2025Updated last year
- RISCV MYTH 4 stage pipelined core designed using TL-Verilog and supports RV32I base integer instruction set☆16Jan 14, 2021Updated 5 years ago
- ordspecsim: The Swarm architecture simulator☆25Feb 15, 2023Updated 3 years ago
- VHDL code examples for a digital design course☆25Jan 29, 2020Updated 6 years ago
- Programmable System on Chip for control of atomic physics experiments☆11Sep 13, 2022Updated 3 years ago
- 文档编写☆14Sep 19, 2020Updated 5 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- A RISC-V 32 bits, Out Of Order, single issue with branch prediction CPU, implementing the B, C, M and Zfinx extensions.☆21Jul 18, 2026Updated last week
- A RISC-V core running Debian (and a LoongArch core running Linux).☆23Nov 24, 2025Updated 8 months ago
- ☆45Oct 7, 2023Updated 2 years ago
- Mini RISC-V SOC☆13Nov 13, 2015Updated 10 years ago
- RiscSoC 是一个芯片集成项目，包含了 Cortex-M0、Cortex-M3、MIPS、RISC-V、4-BIT 等内核的 SoC 集成，部分 SoC 使用的自己设计的内核☆13Apr 26, 2022Updated 4 years ago
- 一个低成本的小霸王游戏机复刻☆25May 28, 2025Updated last year
- Reference book for SoC and FPGA designers integrating Arm Cortex-M processors with AMBA bus architectures (educational)☆45Jun 16, 2025Updated last year