ultraembedded / ecpix-5
Projects for the ECPiX-5 - a ECP5 FPGA board.
☆14Updated 4 years ago
Alternatives and similar repositories for ecpix-5:
Users that are interested in ecpix-5 are comparing it to the libraries listed below
- Test of a RP2040 PMOD attached to a LiteX SoC.☆25Updated last year
- Full Speed USB DFU interface for FPGA and ASIC designs☆17Updated 11 months ago
- Utilities for the ECP5 FPGA☆18Updated 3 years ago
- Simplified environment for litex☆14Updated 4 years ago
- WCH CH569 SerDes Reverse Engineering☆26Updated 2 years ago
- ☆15Updated 2 years ago
- Fully featured implementation of Inter-IC (I2C) bus master for FPGAs☆26Updated 4 years ago
- Small footprint and configurable Inter-Chip communication cores☆55Updated this week
- Experimental FPGA project for streaming two MIPI CSI camera streams to an HDMI monitor using a ULX3S FPGA board☆28Updated last year
- Mini CPU design with JTAG UART support☆19Updated 3 years ago
- Information on cores available on the Ulx3s ECP5 FPGA board☆14Updated 4 years ago
- This is a collection of the built in libraries of the VHDPlus IDE toghether with examples. Commits will be featured in the IDE with futur…☆18Updated last year
- Löwe FPGA Board☆12Updated last year
- CRUVI Standard Specifications☆17Updated 9 months ago
- Picorv32 SoC that uses only BRAM, not flash memory☆12Updated 6 years ago
- Use ECP5 JTAG port to interact with user design☆26Updated 3 years ago
- nMigen examples for the ULX3S board☆16Updated 4 years ago
- verilog core for ws2812 leds☆32Updated 3 years ago
- Example Verilog code for Ulx3s☆40Updated 2 years ago
- PLEASE MOVE TO PAWSv2☆17Updated 3 years ago
- Programmable multichannel ADPCM decoder for FPGA☆23Updated 4 years ago
- ULPI Link Wrapper (USB Phy Interface)☆25Updated 4 years ago
- snap package for nextpnr PnR FPGA toolchain for Xilinx 7 series FPGAs, with Spartan7, Artix7, Zynq7 and Kintex7 support☆28Updated 7 months ago
- ☆43Updated 11 months ago
- Adapter to use Colorlight i5/i9 FPGA boards in a QMTech board form factor☆18Updated 2 years ago
- IEEE 754 single precision floating point library in systemverilog and vhdl☆29Updated 2 months ago
- A general slow DDR3 interface. Very little resource consumption. Suits for all FPGAs with 1.5V IO voltage.☆12Updated 2 years ago
- Bit streams forthe Ulx3s ECP5 device☆16Updated last year
- An all-digital GPS disciplined oscillator using MMCM phase shift.☆27Updated 2 years ago