nickson-jose / vsdstdcelldesign
This repository contains all the information needed to run RTL2GDSII flow using openlane flow. Apart from that, it also contain procedures on how to create a custom LEF file and plugging it into an openlane flow.
☆65Updated 4 years ago
Alternatives and similar repositories for vsdstdcelldesign:
Users that are interested in vsdstdcelldesign are comparing it to the libraries listed below
- This project describes how the PNR of an analog IP, 2:1 analog multiplexer is carried out by opensource EDA tools, Openlane. It also disc…☆44Updated 4 years ago
- ☆40Updated 3 years ago
- VSDBabySoC is a small mixed-signal SoC including PLL, DAC, and a RISCV-based processor named RVMYTH.☆38Updated 3 years ago
- Design of 1024x32 SRAM (32Kbits) using OpenRAM and SKY130 PDKs with operating voltage of 1.8V and access time < 2.5ns☆66Updated 3 years ago
- This repository contains all the contents studied and created during the Advanced Physical Design Workshop using OpenLANE and SKY130 PDK☆38Updated 3 years ago
- Introductory course into static timing analysis (STA).☆86Updated 4 months ago
- Documentation for the 5 day workshop: Advanced Physical Design using OpenLane/Sky130☆55Updated 2 years ago
- This project is done in the course of "Advanced Physical Design using OpenLANE/Sky130" workshop by VLSI System Design Corporation. In thi…☆44Updated 3 years ago
- Open Source tool to build liberty files and for Characterizing Standard Cells.☆25Updated 4 years ago
- This repository aims to capture the works done in 5-day workshop of Adavance Physical Design using OpenLANE/SkyWater130. The workshop hel…☆22Updated 3 years ago
- A PULP SoC for education, easy to understand and extend with a full flow for a physical design.☆61Updated this week
- In this tutorial, you learn how to implement a design from RTL-to-GDSII using Cadence® tools.☆44Updated last year
- ☆14Updated last year
- This script builds openlane and all its dependencies on an Ubuntu (only) System.☆21Updated 2 years ago
- This project produces a clean GDSII Layout with all its details that are used to print photomasks used in the fabrication of a behavioral…☆13Updated 3 years ago
- 5 Day TCL begginer to advanced training workshop by VSD☆16Updated last year
- VSDFLOW is an automated solution to programmers, hobbyists and small scale semiconductor technology entrepreneurs who can craft the…☆15Updated 4 years ago
- Python Tool for UVM Testbench Generation☆50Updated 9 months ago
- Curriculum for a university course to teach chip design using open source EDA tools☆57Updated last year
- tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles☆35Updated 2 years ago
- In this workshop, we will delve into the process of designing an Application Specific Integrated Circuit (ASIC) from the Register Transf…☆9Updated 6 months ago
- Home of the open-source EDA course.☆35Updated this week
- PLL Designs on Skywater 130nm MPW☆20Updated last year
- Developed with the aim of providing engineers and designers with a centralized resource, this repository serves as a valuable reference f…☆56Updated 11 months ago
- ☆31Updated 2 months ago
- ☆16Updated 2 years ago
- ☆20Updated 3 years ago
- The Open Source Hardware Accelerator for Efficient Neural Network Inference☆43Updated 2 weeks ago