Geetima2021 / PLL-IC-design-using-Open-Source-PDK-Google-Skywater-130nmLinks
This repository in a walk through the entire process of PLL IC designing from the tools to the final tapeout.
☆20Updated 3 years ago
Alternatives and similar repositories for PLL-IC-design-using-Open-Source-PDK-Google-Skywater-130nm
Users that are interested in PLL-IC-design-using-Open-Source-PDK-Google-Skywater-130nm are comparing it to the libraries listed below
Sorting:
- This project describes how the PNR of an analog IP, 2:1 analog multiplexer is carried out by opensource EDA tools, Openlane. It also disc…☆44Updated 4 years ago
- ☆84Updated 6 months ago
- This repository contains all the contents studied and created during the Advanced Physical Design Workshop using OpenLANE and SKY130 PDK☆38Updated 3 years ago
- Documentation for the 5 day workshop: Advanced Physical Design using OpenLane/Sky130☆66Updated 2 years ago
- VSDBabySoC is a small mixed-signal SoC including PLL, DAC, and a RISCV-based processor named RVMYTH.☆44Updated 3 years ago
- This project shows the design of a frequency synthesizer PLL system that produces a 1.92 GHz signal with a reference input of 30 MHz, wit…☆71Updated 2 years ago
- FOSS-ASIC-TOOLS is all in one container for SKY130 based design both Analog and Digital. Below is a list of the current tools already ins…☆92Updated 11 months ago
- Ancillary Material for the book "Systematic Design of Analog CMOS Circuits"☆156Updated this week
- EE 628: Analysis and Design of Integrated Circuits (University of Hawaiʻi at Mānoa)☆160Updated last week
- XSCHEM symbol libraries for the Google-Skywater 130nm process design kit.☆64Updated last month
- This repository contains all the information needed to run RTL2GDSII flow using openlane flow. Apart from that, it also contain procedure…☆73Updated 4 years ago
- Python script for generating lookup tables for the gm/ID design methodology and much more ...☆95Updated 3 months ago
- The project is about building an 8-row by 8-bit 6T SRAM memory array, & a 3-to-8 decoder that's used to access the SRAM array. The layout…☆73Updated 3 years ago
- JKU IIC OSIC-Multitool for open-source IC (OSIC) design for SKY130.☆67Updated 4 months ago
- IEEE Solid-State Circuits Society (SSCS) Open-Source Ecosystem (OSE)☆186Updated 2 months ago
- Solve one design problem each day for a month☆44Updated 2 years ago
- ☆83Updated last week
- Design of 1024x32 SRAM (32Kbits) using OpenRAM and SKY130 PDKs with operating voltage of 1.8V and access time < 2.5ns☆73Updated 4 years ago
- PLL Designs on Skywater 130nm MPW☆20Updated last year
- This project discusses the design of an 8-bit asynchronous successive approximation register (SAR) analog-to-digital converter (ADC) impl…☆168Updated 8 months ago
- This project is done in the course of "Advanced Physical Design using OpenLANE/Sky130" workshop by VLSI System Design Corporation. In thi…☆46Updated 4 years ago
- Sandbox for experimenting with Ngspice and open PDKs in Google Colab☆24Updated last year
- Design of miller compensated 2 stage opamp using open source SKY130PDK☆12Updated last month
- ☆41Updated 3 years ago
- Skywaters 130nm Klayout PDK☆26Updated 6 months ago
- VSDFLOW is an automated solution to programmers, hobbyists and small scale semiconductor technology entrepreneurs who can craft the…☆15Updated 5 years ago
- A python3 gm/ID starter kit☆51Updated 11 months ago
- Static Timing Analysis Full Course☆57Updated 2 years ago
- ☆41Updated last year
- Learning to do things with the Skywater 130nm process☆84Updated 4 years ago