kunalg123 / sky130RTLDesignAndSynthesisWorkshopLinks
☆19Updated 3 years ago
Alternatives and similar repositories for sky130RTLDesignAndSynthesisWorkshop
Users that are interested in sky130RTLDesignAndSynthesisWorkshop are comparing it to the libraries listed below
Sorting:
- VSDBabySoC is a small mixed-signal SoC including PLL, DAC, and a RISCV-based processor named RVMYTH.☆49Updated 3 years ago
- This repository contains all the information needed to run RTL2GDSII flow using openlane flow. Apart from that, it also contain procedure…☆74Updated 4 years ago
- VSDFLOW is an automated solution to programmers, hobbyists and small scale semiconductor technology entrepreneurs who can craft the…☆16Updated 5 years ago
- This project describes how the PNR of an analog IP, 2:1 analog multiplexer is carried out by opensource EDA tools, Openlane. It also disc…☆44Updated 4 years ago
- ☆43Updated 3 years ago
- Documentation for the 5 day workshop: Advanced Physical Design using OpenLane/Sky130☆66Updated 3 years ago
- ☆15Updated 3 years ago
- This repo is created to include illustrative examples on object oriented design pattern in SV☆60Updated 2 years ago
- Design of 1024x32 SRAM (32Kbits) using OpenRAM and SKY130 PDKs with operating voltage of 1.8V and access time < 2.5ns☆78Updated 4 years ago
- This repository in a walk through the entire process of PLL IC designing from the tools to the final tapeout.☆20Updated 3 years ago
- Asynchronous fifo in verilog☆35Updated 9 years ago
- This project was done as a part of RISC-V based MYTH (Microprocessor for you in Thirty Hours) workshop organized by Kunal Ghosh and Steve…☆80Updated last year
- ☆13Updated 6 months ago
- SystemVerilog Direct Programming Interface (DPI) Tutorial☆70Updated 4 years ago
- In this tutorial, you learn how to implement a design from RTL-to-GDSII using Cadence® tools.☆85Updated last year
- Python Tool for UVM Testbench Generation☆54Updated last year
- Repository gathering basic modules for CDC purpose☆54Updated 5 years ago
- Curriculum for a university course to teach chip design using open source EDA tools☆110Updated last year
- 5 Day TCL begginer to advanced training workshop by VSD☆18Updated last year
- The Open Source Hardware Accelerator for Efficient Neural Network Inference☆47Updated this week
- ☆48Updated 4 years ago
- Developed with the aim of providing engineers and designers with a centralized resource, this repository serves as a valuable reference f…☆63Updated last year
- OSVVM Documentation☆35Updated 2 weeks ago
- Structured UVM Course☆50Updated last year
- Design Verification Engineer interview preparation guide.☆38Updated 2 months ago
- This project is done in the course of "Advanced Physical Design using OpenLANE/Sky130" workshop by VLSI System Design Corporation. In thi…☆49Updated 4 years ago
- Introductory course into static timing analysis (STA).☆97Updated 3 months ago
- Static Timing Analysis Full Course☆60Updated 2 years ago
- This repository aims to capture the works done in 5-day workshop of Adavance Physical Design using OpenLANE/SkyWater130. The workshop hel…☆22Updated 4 years ago
- Standard Cell Library based Memory Compiler using FF/Latch cells☆158Updated 3 months ago