☆49Apr 7, 2024Updated 2 years ago
Alternatives and similar repositories for DIGITAL-VLSI-SOC-DESIGN-AND-PLANNING
Users that are interested in DIGITAL-VLSI-SOC-DESIGN-AND-PLANNING are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Semiconductor Packaging Fundamentals☆37May 19, 2025Updated last year
- This repository is a summary of the RISC-V based MYTH workshop organised by VSD and Redwood EDA, made by Ahtesham Ahmed of grade 8.☆21May 12, 2025Updated last year
- ☆25Nov 11, 2025Updated 9 months ago
- Design of 4KB(1024*32) SRAM with operating voltage 1.8v and access time < 2.5ns☆17Dec 8, 2020Updated 5 years ago
- ☆11Sep 9, 2022Updated 3 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- This repository contains the tasks performed for VL508- Physical Design of ASIC Course (Fall 2024)☆34Nov 25, 2024Updated last year
- This Repo contains Codes of RTLs for implementation of various circuit designs using Verilog in Xilinx ISE 14.7 and sometimes Modelsim to…☆21Aug 5, 2023Updated 3 years ago
- RISC V core implementation using Verilog.☆31Mar 27, 2021Updated 5 years ago
- This repository contains all the information needed to run RTL2GDSII flow using openlane flow. Apart from that, it also contain procedure…☆84Nov 26, 2020Updated 5 years ago
- ☆13Dec 1, 2024Updated last year
- VSDSquadron Research Internship 2024 program where we learn about RISC-V processor and VLSI Design using various open source tools.☆33Jul 21, 2025Updated last year
- Home of the open-source EDA course.☆55Jun 12, 2025Updated last year
- - Designed a Nand Flash Controller, Flash Memory and Buffer (Design Target : Samsung K9F1G08R0A NAND Flash). - Implemented operations : …☆21Apr 15, 2018Updated 8 years ago
- This repository provides a Linux kernel driver for AXI UART Lite accessed via PCIe XDMA. It enables efficient DMA-based UART communicatio…☆16May 2, 2025Updated last year
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Design of miller compensated 2 stage opamp using open source SKY130PDK☆19Jun 18, 2025Updated last year
- ☆19Sep 16, 2022Updated 3 years ago
- This project describes how the PNR of an analog IP, 2:1 analog multiplexer is carried out by opensource EDA tools, Openlane. It also disc…☆49Dec 6, 2020Updated 5 years ago
- In this tutorial, you learn how to implement a design from RTL-to-GDSII using Cadence® tools.☆128Feb 22, 2024Updated 2 years ago
- ☆18Dec 13, 2022Updated 3 years ago
- Documentation for the 2025 IEEE SSCS Chipathon Track on MOSbius☆19Sep 6, 2025Updated 11 months ago
- This repository contains my work from the VLSI System Design (VSD) Workshop on 7nm FinFET Circuit Design and Characterization using the A…☆16Sep 9, 2025Updated 11 months ago
- This project offers an immersive tutorial experienced within the context of the Advanced Physical Design, focusing on the utilization of …☆41Sep 21, 2023Updated 2 years ago
- Memory Level Verification of Dual Port RAM using SystemVerilog and Universal Verification Methodology Environments with assertions,functi…☆30Nov 21, 2020Updated 5 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- ☆118Dec 24, 2023Updated 2 years ago
- # 3.Interview_Questions In my experience, the questions i faced in the interviews and the people surrounded me must have faced a couple o…☆26Jul 9, 2025Updated last year
- The project involves the design of a 4X4 (16-bit) SRAM Memory Array using Cadence Virtuoso☆66Mar 21, 2024Updated 2 years ago
- Education kit for teaching VLSI fundamentals through practical microprocessor design using industry EDA tools (educational)☆351May 30, 2025Updated last year
- Simple and effective parallel CRC calculator written in synthesizable SystemVerilog☆15Apr 11, 2019Updated 7 years ago
- ☆18Jun 12, 2023Updated 3 years ago
- TensorCore Vector Processor for Deep Learning - Google Summer of Code Project☆27Aug 23, 2021Updated 4 years ago
- Tutorials for getting started with an f8 softcore on an FPGA board☆13Aug 17, 2025Updated last year
- ☆10Nov 30, 2022Updated 3 years ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- Machine learning can enhance a BMS by improving SOC and SOH estimation, detecting faults, and optimizing control policies. By leveraging …☆14Feb 16, 2024Updated 2 years ago
- Implementation of a RISC-V CPU in Verilog.☆18Jun 27, 2026Updated last month
- Covered is a Verilog code coverage utility using VCD/LXT/FST dumpfiles (or VPI interface) and the design to generate line, toggle, memory…☆31Oct 18, 2018Updated 7 years ago
- This repository aims to capture the works done in 5-day workshop of Adavance Physical Design using OpenLANE/SkyWater130. The workshop hel…☆23Jul 5, 2021Updated 5 years ago
- This repository contains all the information studied and created during the FPGA - Fabric, Design and Architecture workshop. It is primar…☆44Mar 28, 2022Updated 4 years ago
- ☆14Feb 14, 2022Updated 4 years ago
- HDLBits-Solutions☆12May 27, 2022Updated 4 years ago