efabless / OpenLaneLinks
This repo is a fork of the master OpenLANE repo for us with projects submitted on Efabless Open MPW or chipIgnite shuttles:: OpenLANE is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen, Fault and custom methodology scripts for design exploration and optimization.
☆153Updated last year
Alternatives and similar repositories for OpenLane
Users that are interested in OpenLane are comparing it to the libraries listed below
Sorting:
- Caravel is a standard SoC template with on chip resources to control and read/write operations from a user-dedicated space.☆329Updated 3 months ago
- The next generation of OpenLane, rewritten from scratch with a modular architecture☆301Updated 3 months ago
- Fully Open Source FASOC generators built on top of open-source EDA tools☆282Updated last week
- ☆111Updated 2 years ago
- https://caravel-user-project.readthedocs.io☆202Updated 4 months ago
- PDK installer for open-source EDA tools and toolchains. Distributed with setups for the SkyWater 130nm and Global Foundries 180nm open p…☆335Updated this week
- Fabric generator and CAD tools.☆187Updated last week
- ☆331Updated 2 years ago
- IEEE Solid-State Circuits Society (SSCS) Open-Source Ecosystem (OSE)☆183Updated last month
- SOFA (Skywater Opensource FPGAs) based on Skywater 130nm PDK and OpenFPGA☆139Updated 2 years ago
- Standard Cell Library based Memory Compiler using FF/Latch cells☆147Updated last year
- Qflow full end-to-end digital synthesis flow for ASIC designs☆214Updated 7 months ago
- PDK for GlobalFoundries' 180nm MCU bulk process technology (GF180MCU).☆402Updated 2 years ago
- 8x PLL Clock Multiplier IP with an input frequency range of 5Mhz to 12.5Mhz and output frequency range of 40Mhz to 100Mhz, giving a 8x mu…☆113Updated 3 years ago
- Course material for a basic hands-on analog circuit design course with IC emphasis☆123Updated last week
- Caravel is a standard SoC hardness with on chip resources to control and read/write operations from a user-dedicated space.☆136Updated 3 years ago
- 130nm BiCMOS Open Source PDK, dedicated for Analog, Mixed Signal and RF Design☆557Updated this week
- Arduino compatible Risc-V Based SOC☆151Updated 11 months ago
- ☆78Updated 2 years ago
- A complete open-source design-for-testing (DFT) Solution☆159Updated 3 weeks ago
- Version manager (and builder) for the Google sky130 and gf180mcu open-source PDKs☆66Updated this week
- OpenROAD users should look at this repository first for instructions on getting started☆101Updated 4 years ago
- Magic VLSI Layout Tool☆543Updated this week
- Example designs showing different ways to use F4PGA toolchains.☆276Updated last year
- ☆149Updated 3 years ago
- Documentation for the 5 day workshop: Advanced Physical Design using OpenLane/Sky130☆63Updated 2 years ago
- A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy an…☆388Updated 2 weeks ago
- Hammer: Highly Agile Masks Made Effortlessly from RTL☆282Updated last month
- ☆168Updated last year
- Universal Hardware Data Model. A complete modeling of the IEEE SystemVerilog Object Model with VPI Interface, Elaborator, Serialization, …☆219Updated last week