efabless / OpenLaneLinks
This repo is a fork of the master OpenLANE repo for us with projects submitted on Efabless Open MPW or chipIgnite shuttles:: OpenLANE is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen, Fault and custom methodology scripts for design exploration and optimization.
☆160Updated last year
Alternatives and similar repositories for OpenLane
Users that are interested in OpenLane are comparing it to the libraries listed below
Sorting:
- ☆357Updated 2 years ago
- https://caravel-user-project.readthedocs.io☆223Updated 8 months ago
- ☆119Updated 2 years ago
- Caravel is a standard SoC template with on chip resources to control and read/write operations from a user-dedicated space.☆363Updated 8 months ago
- PDK installer for open-source EDA tools and toolchains. Distributed with setups for the SkyWater 130nm and Global Foundries 180nm open p…☆370Updated this week
- Fully Open Source FASOC generators built on top of open-source EDA tools☆298Updated 3 weeks ago
- The next generation of OpenLane, rewritten from scratch with a modular architecture☆319Updated 8 months ago
- Fabric generator and CAD tools.☆206Updated this week
- ASIC implementation flow infrastructure☆173Updated this week
- 8x PLL Clock Multiplier IP with an input frequency range of 5Mhz to 12.5Mhz and output frequency range of 40Mhz to 100Mhz, giving a 8x mu…☆117Updated 4 years ago
- Qflow full end-to-end digital synthesis flow for ASIC designs☆221Updated last year
- ☆84Updated 3 years ago
- Standard Cell Library based Memory Compiler using FF/Latch cells☆162Updated last week
- OpenROAD users should look at this repository first for instructions on getting started☆101Updated 4 years ago
- IEEE Solid-State Circuits Society (SSCS) Open-Source Ecosystem (OSE)☆193Updated this week
- FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.☆295Updated last week
- SOFA (Skywater Opensource FPGAs) based on Skywater 130nm PDK and OpenFPGA☆144Updated 2 years ago
- Documentation for the 5 day workshop: Advanced Physical Design using OpenLane/Sky130☆67Updated 3 years ago
- Index of the fully open source process design kits (PDKs) maintained by Google.☆108Updated 3 years ago
- PDK for GlobalFoundries' 180nm MCU bulk process technology (GF180MCU).☆436Updated 2 years ago
- 130nm BiCMOS Open Source PDK, dedicated for Analog, Mixed Signal and RF Design☆634Updated this week
- ☆173Updated 2 years ago
- Arduino compatible Risc-V Based SOC☆157Updated last year
- Caravel is a standard SoC hardness with on chip resources to control and read/write operations from a user-dedicated space.☆136Updated 3 years ago
- SystemVerilog synthesis tool☆218Updated 8 months ago
- ☆110Updated 2 years ago
- FuseSoC standard core library☆148Updated 5 months ago
- Learning to do things with the Skywater 130nm process☆86Updated 5 years ago
- Example designs showing different ways to use F4PGA toolchains.☆276Updated last year
- FOSS-ASIC-TOOLS is all in one container for SKY130 based design both Analog and Digital. Below is a list of the current tools already ins…☆104Updated last year