vsdip / vsdsram_sky130Links
☆41Updated 3 years ago
Alternatives and similar repositories for vsdsram_sky130
Users that are interested in vsdsram_sky130 are comparing it to the libraries listed below
Sorting:
- This repository contains all the information needed to run RTL2GDSII flow using openlane flow. Apart from that, it also contain procedure…☆79Updated 5 years ago
- Design of 1024x32 SRAM (32Kbits) using OpenRAM and SKY130 PDKs with operating voltage of 1.8V and access time < 2.5ns☆82Updated 4 years ago
- Documentation for the 5 day workshop: Advanced Physical Design using OpenLane/Sky130☆74Updated 3 years ago
- VSDBabySoC is a small mixed-signal SoC including PLL, DAC, and a RISCV-based processor named RVMYTH.☆51Updated 4 years ago
- This project describes how the PNR of an analog IP, 2:1 analog multiplexer is carried out by opensource EDA tools, Openlane. It also disc…☆48Updated 5 years ago
- This repository contains all the contents studied and created during the Advanced Physical Design Workshop using OpenLANE and SKY130 PDK☆45Updated 3 years ago
- This project is done in the course of "Advanced Physical Design using OpenLANE/Sky130" workshop by VLSI System Design Corporation. In thi…☆55Updated 4 years ago
- tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles☆37Updated 3 years ago
- XSCHEM symbol libraries for the Google-Skywater 130nm process design kit.☆69Updated 2 months ago
- Python Tool for UVM Testbench Generation☆55Updated last year
- Design of 1024*32 (4kB) SRAM with access time < 2.5ns using OpenRAM☆19Updated 5 years ago
- VSDFLOW is an automated solution to programmers, hobbyists and small scale semiconductor technology entrepreneurs who can craft the…☆164Updated 2 years ago
- A simple DDR3 memory controller☆61Updated 3 years ago
- This repository aims to capture the works done in 5-day workshop of Adavance Physical Design using OpenLANE/SkyWater130. The workshop hel…☆22Updated 4 years ago
- 55nm CMOS Open Source PDK by ICsprout Integrated Circuit Co., Ltd.☆166Updated last month
- This script builds openlane and all its dependencies on an Ubuntu (only) System.☆23Updated 3 years ago
- This repo shows an implementation of an FPGA from RTL to GDS with open Skywater-130 pdk☆38Updated 4 years ago
- Minimal SKY130 example with self-checking LVS, DRC, and PEX☆24Updated 5 years ago
- SRAM☆22Updated 5 years ago
- PLL Designs on Skywater 130nm MPW☆22Updated 2 years ago
- Introductory course into static timing analysis (STA).☆99Updated 6 months ago
- UW reference flow for Free45PDK and The OpenROAD Project☆12Updated 5 years ago
- Home of the open-source EDA course.☆52Updated 7 months ago
- This repo is created to include illustrative examples on object oriented design pattern in SV☆60Updated 2 years ago
- SystemVerilog RTL Linter for YoSys☆23Updated last year
- This repository contains simulation files and other relevant files on the On-chip clock multiplier (PLL) (Fclkin—5MHz to 12MHz, Fclkout—4…☆15Updated 4 years ago
- SoCGen is a tool that automates SoC design by taking in a JSON description of the system and producing the final GDS-II. SoCGen supports …☆39Updated 5 years ago
- The Open Source Hardware Accelerator for Efficient Neural Network Inference☆48Updated last week
- ☆20Updated 4 years ago
- ☆33Updated 3 weeks ago