RTimothyEdwards / magicLinks
Magic VLSI Layout Tool
☆549Updated 3 weeks ago
Alternatives and similar repositories for magic
Users that are interested in magic are comparing it to the libraries listed below
Sorting:
- A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy an…☆393Updated this week
- 130nm BiCMOS Open Source PDK, dedicated for Analog, Mixed Signal and RF Design☆572Updated this week
- PDK installer for open-source EDA tools and toolchains. Distributed with setups for the SkyWater 130nm and Global Foundries 180nm open p…☆337Updated 2 weeks ago
- IIC-OSIC-TOOLS is an all-in-one Docker image for SKY130/GF180/IHP130-based analog and digital chip design. AMD64 and ARM64 are natively s…☆578Updated this week
- An open-source static random access memory (SRAM) compiler.☆920Updated 2 weeks ago
- PDK for GlobalFoundries' 180nm MCU bulk process technology (GF180MCU).☆402Updated 2 years ago
- Qflow full end-to-end digital synthesis flow for ASIC designs☆216Updated 8 months ago
- The next generation of OpenLane, rewritten from scratch with a modular architecture☆301Updated 4 months ago
- Fully Open Source FASOC generators built on top of open-source EDA tools☆283Updated 2 weeks ago
- OpenROAD's scripts implementing an RTL-to-GDS Flow. Documentation at https://openroad-flow-scripts.readthedocs.io/en/latest/☆455Updated this week
- Caravel is a standard SoC template with on chip resources to control and read/write operations from a user-dedicated space.☆338Updated 4 months ago
- SystemVerilog to Verilog conversion☆645Updated 3 weeks ago
- FOSS Flow For FPGA☆394Updated 6 months ago
- OpenSTA engine☆486Updated this week
- ☆333Updated 2 years ago
- The Xyce™ Parallel Electronic Simulator☆68Updated last month
- An abstraction library for interfacing EDA tools☆699Updated 3 weeks ago
- https://caravel-user-project.readthedocs.io☆206Updated 4 months ago
- Verilog to Routing -- Open Source CAD Flow for FPGA Research☆1,116Updated this week
- This repo is a fork of the master OpenLANE repo for us with projects submitted on Efabless Open MPW or chipIgnite shuttles:: OpenLANE is …☆152Updated last year
- Modular hardware build system☆1,044Updated this week
- A list of resources related to the open-source FPGA projects☆416Updated 2 years ago
- UVVM (Universal VHDL Verification Methodology) is a free and Open Source Methodology and Library for very efficient VHDL verification of …☆402Updated 2 months ago
- VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!☆625Updated 3 months ago
- SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows☆461Updated this week
- SystemVerilog 2017 Pre-processor, Parser, Elaborator, UHDM Compiler. Provides IEEE Design/TB C/C++ VPI and Python AST & UHDM APIs. Compil…☆398Updated 2 weeks ago
- Book repository "Analysis and Design of Elementary MOS Amplifier Stages"☆358Updated 10 months ago
- GDS3D is an application that can interpret so called IC layouts and render them in 3D. The program accepts standard GDSII files as input …☆225Updated 10 months ago
- GTKWave is a fully featured GTK+ based wave viewer for Unix and Win32 which reads LXT, LXT2, VZT, FST, and GHW files as well as standard …☆801Updated 3 weeks ago
- FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.☆290Updated last week