fayizferosh / soc-design-and-planning-nasscom-vsd
2 Week digital VLSI SoC design and planning workshop with complete RTL2GDSII flow organised by VSD in collaboration with NASSCOM (Advanced Physical Design using OpenLANE/Sky130)
☆16Updated 11 months ago
Alternatives and similar repositories for soc-design-and-planning-nasscom-vsd:
Users that are interested in soc-design-and-planning-nasscom-vsd are comparing it to the libraries listed below
- In this workshop, we will delve into the process of designing an Application Specific Integrated Circuit (ASIC) from the Register Transf…☆11Updated 7 months ago
- ☆15Updated 8 months ago
- Architectural design of data router in verilog☆29Updated 5 years ago
- ☆10Updated 2 years ago
- 5 Day TCL begginer to advanced training workshop by VSD☆17Updated last year
- "Mastering Verilog Programming for Digital Circuit Design: RTL and TestBench Codes Practice with HDL-BITS"☆15Updated last year
- ☆12Updated last month
- I am a VLSI enthusiast and I'm going to start my journey of 100 days of RTL.☆22Updated last year
- Documentation for the 5 day workshop: Advanced Physical Design using OpenLane/Sky130☆55Updated 2 years ago
- ☆17Updated last year
- This Repo contains Codes of RTLs for implementation of various circuit designs using Verilog in Xilinx ISE 14.7 and sometimes Modelsim to…☆19Updated last year
- In this repository, I have shared the codes for designs and testbenches, Elaborated Design and Simulation Output for each block of RISC-V…☆10Updated 7 months ago
- Welcome to the 108 RTL Projects repository! This collection aims to provide a comprehensive set of RTL design projects ranging from simpl…☆11Updated 2 months ago
- "100 days of RTL" is a personal project to learn Verilog HDL RTL design in 100 days, using Xilinx Vivado☆67Updated last year
- Advanced encryption standard (AES) algorithm has been widely deployed in cryptographic applications. This work proposes a low power and h…☆20Updated 3 years ago
- ☆16Updated last year
- opensource EDA tool flor VLSI design☆32Updated last year
- This project produces a clean GDSII Layout with all its details that are used to print photomasks used in the fabrication of a behavioral…☆13Updated 3 years ago
- ☆39Updated last year
- Developed with the aim of providing engineers and designers with a centralized resource, this repository serves as a valuable reference f…☆57Updated 11 months ago
- ☆14Updated last year
- ☆17Updated 2 years ago
- I present a novel pipelined fast Fourier transform (FFT) architecture which is capable of producing the output sequence in normal order. …☆39Updated last year
- ☆28Updated 11 months ago
- IEEE Executive project for the year 2021-2022☆9Updated 2 years ago
- This repository contains all the contents studied and created during the Advanced Physical Design Workshop using OpenLANE and SKY130 PDK☆38Updated 3 years ago
- VSDSquadron Research Internship 2024 program where we learn about RISC-V processor and VLSI Design using various open source tools.☆26Updated 10 months ago
- ☆15Updated last year
- ☆106Updated last year
- A complete UVM TB for verification of single port 64KB RAM☆15Updated 3 years ago