najaeda / naja
Structural Netlist API (and more) for EDA post synthesis flow development
☆93Updated 2 weeks ago
Alternatives and similar repositories for naja:
Users that are interested in naja are comparing it to the libraries listed below
- Coriolis VLSI EDA Tool (LIP6)☆63Updated last week
- SystemVerilog frontend for Yosys☆96Updated this week
- An automatic clock gating utility☆47Updated last week
- A Standalone Structural Verilog Parser☆91Updated 3 years ago
- A SystemVerilog source file pickler.☆56Updated 6 months ago
- ☆31Updated 3 months ago
- Plugins for Yosys developed as part of the F4PGA project.☆83Updated 11 months ago
- Raptor end-to-end FPGA Compiler and GUI☆78Updated 4 months ago
- ☆38Updated 2 months ago
- ☆45Updated 2 months ago
- Library of open source Process Design Kits (PDKs)☆39Updated last week
- Python bindings for slang, a library for compiling SystemVerilog☆57Updated 3 months ago
- A PULP SoC for education, easy to understand and extend with a full flow for a physical design.☆74Updated this week
- Hardware Description Library☆78Updated 2 weeks ago
- Create fast and efficient standard cell based adders, multipliers and multiply-adders.☆113Updated last year
- Spicing up the first and (no longer) the only EU FPGA chip with a flashy new board, loaded with a suite of engaging demos and examples =>…☆61Updated last week
- ☆35Updated 3 weeks ago
- ☆79Updated 2 years ago
- Hardware generator debugger☆73Updated last year
- Open source process design kit for 28nm open process☆54Updated last year
- Qrouter detail router for digital ASIC designs☆57Updated 2 weeks ago
- ☆31Updated last year
- FPGA tool performance profiling☆102Updated last year
- Framework Open EDA Gui☆64Updated 4 months ago
- XSCHEM symbol libraries for the Google-Skywater 130nm process design kit.☆62Updated 3 weeks ago
- Workshop on Open-Source EDA Technology (WOSET)☆49Updated 5 months ago
- ☆43Updated 5 years ago
- A tool that converts SystemVerilog to Verilog. Uses Design Compiler, so it is 100% compatible.☆41Updated 2 years ago
- Netgen complete LVS tool for comparing SPICE or verilog netlists☆115Updated 2 weeks ago
- LunaPnR is a place and router for integrated circuits☆46Updated 5 months ago