najaeda / najaLinks
Structural Netlist API (and more) for EDA post synthesis flow development
☆118Updated 2 weeks ago
Alternatives and similar repositories for naja
Users that are interested in naja are comparing it to the libraries listed below
Sorting:
- Coriolis VLSI EDA Tool (LIP6)☆72Updated 3 weeks ago
- WAL enables programmable waveform analysis.☆157Updated 4 months ago
- An automatic clock gating utility☆50Updated 5 months ago
- Plugins for Yosys developed as part of the F4PGA project.☆84Updated last year
- ☆53Updated 6 months ago
- Conda recipes for FPGA EDA tools for simulation, synthesis, place and route and bitstream generation.☆102Updated 8 months ago
- SystemVerilog frontend for Yosys☆165Updated this week
- ☆32Updated 8 months ago
- Create fast and efficient standard cell based adders, multipliers and multiply-adders.☆118Updated 2 years ago
- Hardware Description Library☆84Updated 5 months ago
- ☆88Updated this week
- ASIC implementation flow infrastructure☆125Updated this week
- Fabric generator and CAD tools.☆198Updated last week
- A SystemVerilog source file pickler.☆60Updated 11 months ago
- Standard Cell Library based Memory Compiler using FF/Latch cells☆158Updated 3 months ago
- Library of open source Process Design Kits (PDKs)☆52Updated last week
- A Standalone Structural Verilog Parser☆97Updated 3 years ago
- FPGA tool performance profiling☆102Updated last year
- Raptor end-to-end FPGA Compiler and GUI☆85Updated 9 months ago
- ☆43Updated 7 months ago
- Workshop on Open-Source EDA Technology (WOSET)☆48Updated 10 months ago
- Tools for working with circuits as graphs in python☆124Updated last year
- Code to read various RTL simulator wave formats (fsdb, shm, vcd, wlf) into python and apply it as stimuli via cocotb/plain vpi.☆62Updated 4 years ago
- Builds, flow and designs for the alpha release☆54Updated 5 years ago
- Proposed RISC-V Composable Custom Extensions Specification☆71Updated 3 months ago
- Version manager (and builder) for the Google sky130 and gf180mcu open-source PDKs☆73Updated last month
- ☆44Updated 5 years ago
- ☆30Updated last month
- Framework Open EDA Gui☆69Updated 9 months ago
- A tool that converts SystemVerilog to Verilog. Uses Design Compiler, so it is 100% compatible.☆42Updated 2 years ago