Alternatives and similar repositories for liberty-db

Users that are interested in liberty-db are comparing it to the libraries listed below

• dan-fritchman / Layout21
  Integrated Circuit Layout
  ☆57Updated 11 months ago
• Ravenslofty / librecell
  ☆26Updated 4 years ago
• ucb-substrate / substrate2
  21st century electronic design automation tools, written in Rust.
  ☆33Updated 2 weeks ago
• asyncvlsi / AMC
  AMC: Asynchronous Memory Compiler
  ☆52Updated 5 years ago
• Coloquinte / PlaceRoute
  VLSI placement and routing tool
  ☆15Updated last month
• NVlabs / INSTA
  ☆93Updated 7 months ago
• ckchengucsd / SMT-based-STDCELL-Layout-Generator-for-PROBE2.0
  SMT-based Simultaneous Place-&-Route for Standard Cell Synthesis for PROBE 2.0
  ☆18Updated 5 years ago
• verilog-to-routing / tatum
  Tatum: A Fast, Flexible Static Timing Analysis (STA) Engine for Digital Circuits
  ☆63Updated last year
• geochrist / dctk
  Delay Calculation ToolKit
  ☆32Updated 3 years ago
• ABKGroup / PROBE3.0
  ☆50Updated last year
• Vlsir / Vlsir
  Interchange formats for chip design.
  ☆36Updated 3 weeks ago
• pku-dasys / cocoon
  An infrastructure for integrated EDA
  ☆42Updated 2 years ago
• ekiwi / wellen
  wellen: waveform datastructures in Rust. Fast VCD, FST and GHW parsing for waveform viewers.
  ☆105Updated last week
• OpenTimer / Parser-Verilog
  A Standalone Structural Verilog Parser
  ☆99Updated 3 years ago
• ben-marshall / verilog-vcd-parser
  A parser for Value Change Dump (VCD) files as specified in the IEEE System Verilog 1800-2012 standard.
  ☆103Updated 3 years ago
• scale-lab / OpenPhySyn
  EDA physical synthesis optimization kit
  ☆64Updated 2 years ago
• najaeda / naja
  Structural Netlist API (and more) for EDA post synthesis flow development
  ☆132Updated this week
• eclufsc / libertyParser
  Mirror of Synopsys's Liberty parser library
  ☆24Updated 7 years ago
• zslwyuan / AMF-Placer
  AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…
  ☆109Updated last year
• cuhk-eda / CULS
  GPU-based logic synthesis tool
  ☆97Updated 2 months ago
• pkuzjx / eda-collection
  ☆109Updated 6 years ago
• ALIGN-analoglayout / AnalogDetailedRouter
  Intel's Analog Detailed Router
  ☆40Updated 6 years ago
• The-OpenROAD-Project / DAC-2020-Tutorial
  Material for OpenROAD Tutorial at DAC 2020
  ☆46Updated 3 years ago
• bespoke-silicon-group / bsg_fakeram
  fakeram generator for use by researchers who do not have access to commercial ram generators
  ☆37Updated 3 years ago
• rachelselinar / DREAMPlaceFPGA
  An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit
  ☆91Updated 9 months ago
• idea-fasoc / openfasoc-tapeouts
  Tapeouts done using OpenFASOC
  ☆15Updated 2 months ago
• The-OpenROAD-Project-Attic / FastRoute
  LEF/DEF-based port of Iowa State's open-source FastRoute 4.1
  ☆59Updated 5 years ago
• OpenTimer / Parser-SPEF
  A Fast C++ Header-only Parser for Standard Parasitic Exchange Format (SPEF).
  ☆59Updated 3 years ago
• jinwookjungs / lefdef_util
  A LEF/DEF Utility.
  ☆33Updated 6 years ago
• IntelLabs / FloorSet
  ☆79Updated 3 weeks ago