lip6 / coriolis
Coriolis VLSI EDA Tool (LIP6)
☆60Updated this week
Alternatives and similar repositories for coriolis:
Users that are interested in coriolis are comparing it to the libraries listed below
- SystemVerilog frontend for Yosys☆71Updated 2 weeks ago
- BAG framework☆40Updated 6 months ago
- An automatic clock gating utility☆43Updated 7 months ago
- ☆31Updated last month
- Qrouter detail router for digital ASIC designs☆56Updated 4 months ago
- Library of open source Process Design Kits (PDKs)☆33Updated last week
- ☆53Updated last year
- ☆32Updated 4 months ago
- A SystemVerilog source file pickler.☆54Updated 3 months ago
- ☆45Updated last week
- ☆46Updated last month
- Small SERV-based SoC primarily for OpenMPW tapeout☆38Updated last month
- ☆36Updated last week
- Circuit Automatic Characterization Engine☆47Updated last week
- XSCHEM symbol libraries for the Google-Skywater 130nm process design kit.☆60Updated last week
- Plugins for Yosys developed as part of the F4PGA project.☆80Updated 9 months ago
- ☆36Updated 2 years ago
- A tool that converts SystemVerilog to Verilog. Uses Design Compiler, so it is 100% compatible.☆39Updated last year
- An open source PDK using TIGFET 10nm devices.☆47Updated 2 years ago
- Create fast and efficient standard cell based adders, multipliers and multiply-adders.☆110Updated last year
- Open source process design kit for 28nm open process☆48Updated 9 months ago
- KLayout technology files for Skywater SKY130☆39Updated last year
- Workshop on Open-Source EDA Technology (WOSET)☆48Updated 2 months ago
- IRSIM switch-level simulator for digital circuits☆31Updated 9 months ago
- Determines the modules declared and instantiated in a SystemVerilog file☆43Updated 4 months ago
- Translates GDSII into HTML/JS that can be viewed in WebGL-capable web browsers.☆49Updated 4 years ago
- A configurable SRAM generator☆42Updated last month
- ☆31Updated last year
- Mutation Cover with Yosys (MCY)☆81Updated this week
- Conda recipes for FPGA EDA tools for simulation, synthesis, place and route and bitstream generation.☆100Updated 2 weeks ago