Alternatives and similar repositories for aigverse

Users that are interested in aigverse are comparing it to the libraries listed below

• cda-tum / fiction
  An open-source design automation framework for Field-coupled Nanotechnologies
  ☆78Updated this week
• lsils / lstools-showcase
  Showcase examples for EPFL logic synthesis libraries
  ☆196Updated last year
• Yu-Maryland / MapTune
  MapTune: Advancing ASIC Technology Mapping via Reinforcement Learning Guided Library Tuning Mingju Liu, Daniel Robinson, Yingjie Li, Cunx…
  ☆22Updated 5 months ago
• hkustgz-zhang-lab / ABCPaperCheck
  Research paper based on or related to ABC.
  ☆52Updated 2 months ago
• runekrauss / freddy
  A design automation framework to engineer decision diagrams yourself
  ☆22Updated 3 weeks ago
• munich-quantum-toolkit / syrec
  SyReC Synthesizer - A Tool for HDL-based Synthesis of Reversible Circuits
  ☆30Updated this week
• gmeuli / caterpillar
  ☆27Updated 4 years ago
• lsils / percy
  C++ header-only exact synthesis library
  ☆18Updated 2 years ago
• ckchengucsd / SMTCellUCSD
  Cell Layout Generation for DTCO/STCO Exploration Toolkit
  ☆17Updated 3 months ago
• alanminko / iwls2022-ls-contest
  Problems and Results of IWLS 2022 Programming Contest
  ☆18Updated 5 months ago
• nbulsi / also
  A logic synthesis tool
  ☆81Updated last week
• amahzoon / genmul
  ☆17Updated 4 years ago
• ckchengucsd / SMT-based-STDCELL-Layout-Generator-for-PROBE2.0
  SMT-based Simultaneous Place-&-Route for Standard Cell Synthesis for PROBE 2.0
  ☆18Updated 5 years ago
• whaaswijk / percy
  An advanced header-only exact synthesis library
  ☆27Updated 2 years ago
• zshi0616 / python-deepgate
  ☆23Updated last year
• mflowgen / skywater-130nm
  ASIC Design kit for Skywater 130 for use with mflowgen
  ☆13Updated 2 years ago
• OSCC-Project / iMap
  Logic optimization and technology mapping tool.
  ☆19Updated last year
• msoeken / reversible-sota
  State-of-the-art in reversible logic synthesis
  ☆22Updated 9 years ago
• SPbSAT / cirbo
  ☆23Updated last week
• msoeken / cirkit
  A circuit toolkit
  ☆104Updated 5 years ago
• UCLA-VAST / DPQA
  ☆23Updated last year
• scale-lab / BACS
  Benchmarks for Approximate Circuit Synthesis
  ☆17Updated 5 years ago
• ispras / hdl-benchmarks
  Collection of digital hardware modules & projects (benchmarks)
  ☆61Updated last week
• Gy-Hu / E-Syn
  E-Syn: E-Graph Rewriting with Technology-Aware Cost Functions for Logic Synthesis (DAC 2024)
  ☆36Updated last year
• santoshsmalagi / Benchmarks
  A collection of ISCAS,ITC,TAU and other Benchmark Circuits for EDA tool evaluation.
  ☆56Updated 8 months ago
• lnis-uofu / LSOracle
  IDEA project source files
  ☆108Updated last month
• pulp-platform / ELAU
  ☆19Updated last year
• NVlabs / INSTA
  ☆86Updated 3 months ago
• jpsety / verilog_benchmark_circuits
  EPFL and ISCAS85 combinational benchmark circuits in generic gate verilog
  ☆28Updated 5 years ago
• ASU-VDA-Lab / 2024_ICCAD_Contest_Gate_Sizing_Benchmark
  ☆23Updated 10 months ago