librecores / riscv-sodorLinks
educational microarchitectures for risc-v isa
☆67Updated 6 years ago
Alternatives and similar repositories for riscv-sodor
Users that are interested in riscv-sodor are comparing it to the libraries listed below
Sorting:
- Riscy Processors - Open-Sourced RISC-V Processors☆73Updated 6 years ago
- A Style Guide for the Chisel Hardware Construction Language☆108Updated 4 years ago
- Chisel Learning Journey☆110Updated 2 years ago
- Provides dot visualizations of chisel/firrtl circuits☆121Updated 2 years ago
- RISC-V Rocket Core on Parallella & ZedBoard Zynq FPGA Boards☆103Updated 6 years ago
- CVA6 SDK containing RISC-V tools and Buildroot☆74Updated 3 months ago
- Examples for creating AXI-interfaced peripherals in Chisel☆76Updated 9 years ago
- Yet Another RISC-V Implementation☆97Updated last year
- RISC-V Torture Test☆197Updated last year
- ☆189Updated last year
- A dynamic verification library for Chisel.☆155Updated 10 months ago
- RISC-V Core; superscalar, out-of-order, multi-core capable; based on RISCY-OOO from MIT☆177Updated 4 months ago
- RISC-V Virtual Prototype☆177Updated 9 months ago
- Setup scripts and files needed to compile CoreMark on RISC-V☆70Updated last year
- Chisel components for FPGA projects☆126Updated 2 years ago
- RISC-V RV64GC emulator designed for RTL co-simulation☆232Updated 10 months ago
- AXI Adapter(s) for RISC-V Atomic Operations☆66Updated 3 weeks ago
- OpenSoC Fabric - A Network-On-Chip Generator☆172Updated 5 years ago
- An Open-Source Design and Verification Environment for RISC-V☆84Updated 4 years ago
- Lipsi: Probably the Smallest Processor in the World☆86Updated last year
- Port fpga-zynq (rocket-chip) to Xilinx ZYNQ Ultrascale+ board (ZCU102)☆63Updated 2 years ago
- (System)Verilog to Chisel translator☆116Updated 3 years ago
- Tests for example Rocket Custom Coprocessors☆75Updated 5 years ago
- Bluespec BSV HLHDL tutorial☆110Updated 9 years ago
- Comment on the rocket-chip source code☆180Updated 6 years ago
- RiscyOO: RISC-V Out-of-Order Processor☆162Updated 5 years ago
- ☆97Updated 2 years ago
- Basic floating-point components for RISC-V processors☆66Updated 5 years ago
- RISC-V System on Chip Template☆159Updated last month
- OpTiMSoC - A tiled SoC platform with a mesh NoC and OpenRISC CPU cores☆85Updated 4 years ago