RISC-V Rocket on the Digilent Zybo Board
☆21Aug 6, 2014Updated 12 years ago
Alternatives and similar repositories for zynq-fpga
Users that are interested in zynq-fpga are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A barebones 64-bit RISC-V micro-controller class CPU, implementing the I(nteger), M(ul/div), C(ompressed) and K(ryptography) extensions.☆52Jan 31, 2022Updated 4 years ago
- RISC-V Matrix Specification☆27Dec 2, 2024Updated last year
- 256-bit vector processor based on the RISC-V vector (V) extension☆33May 1, 2021Updated 5 years ago
- A VerilogHDL MCU Core based ARMv6 Cortex-M0☆23Jan 31, 2020Updated 6 years ago
- Reflection and some other related Go-like features for C☆15Jul 21, 2026Updated 3 weeks ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- An Open Source FPGA GroestlCoin Miner☆10Feb 11, 2018Updated 8 years ago
- Fork of https://sourceforge.net/projects/tceetree/☆16Aug 3, 2017Updated 9 years ago
- runtime code injector for Linux☆26May 29, 2011Updated 15 years ago
- A Goldschmidt integer divider written in verilog. Similar to Newton-Raphson but the divison step can be pipelined.☆16Apr 25, 2024Updated 2 years ago
- Verilog implementation of RISC-V: RV32IAC plus much of B. 32-bit or 16-bit bus.☆20Jul 29, 2021Updated 5 years ago
- Modified version of PULP Ara to support Vector Cryptography (Zvk) Instructions☆17Jan 21, 2026Updated 6 months ago
- Processing Unit with RISCV-32 / RISCV-64 / RISCV-128☆20Aug 9, 2026Updated last week
- Qemu tracing plugin using SimPoints☆18Sep 12, 2024Updated last year
- Learn to navigate in dynamic environments with normalized LiDAR scans☆16Sep 22, 2023Updated 2 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- Computer architecture learning environment using FPGAs☆15May 17, 2021Updated 5 years ago
- Multi-Processor System on Chip with RISCV-32 / RISCV-64 / RISCV-128☆14Aug 9, 2026Updated last week
- Xilinx IP repository☆13May 5, 2018Updated 8 years ago
- ROS node to interface cnc machines using GRBL as GCODE interpreter☆11Jun 25, 2019Updated 7 years ago
- Wraps the NVDLA project for Chipyard integration☆24Sep 2, 2025Updated 11 months ago
- A static-analysis tool for dependencies within a C/C++ codebase.☆22Apr 19, 2024Updated 2 years ago
- ☆13Nov 4, 2022Updated 3 years ago
- verilog/FPGA hardware description for very simple GPU☆17Apr 9, 2019Updated 7 years ago
- ☆11Sep 7, 2023Updated 2 years ago
- End-to-end encrypted email - Proton Mail • AdSpecial offer: 40% Off Yearly / 80% Off First Month. All Proton services are open source and independently audited for security.
- SCARV: a side-channel hardened RISC-V platform☆28Jan 11, 2023Updated 3 years ago
- 正点原子开拓者&新起点FPGA开发板例程☆15Nov 29, 2019Updated 6 years ago
- Simple AMP Running Linux and Bare-Metal System on Both Zynq SoC Processors☆23Dec 17, 2015Updated 10 years ago
- A library (for different Arduinos) to build your own CNC machines☆16Jun 26, 2026Updated last month
- Highly-customizable dotfiles manager☆14Feb 19, 2023Updated 3 years ago
- [Course] Hands-On ZYNQ: Mastering AXI4 Bus Protocol☆19Feb 22, 2020Updated 6 years ago
- This repository contains a set of examples of opencl code that can run on the zedboard zynq all programmable soc.☆16Jan 13, 2016Updated 10 years ago
- riscv uclinux☆15Aug 9, 2019Updated 7 years ago
- ☆16Nov 4, 2014Updated 11 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- ☆23Apr 18, 2021Updated 5 years ago
- this repository contains all the ip projects presented in the HLS/RISC-V/Computer Architecture book written by Goossens and published by …☆30Sep 5, 2025Updated 11 months ago
- 用于串口通信或消息的环形队列驱动☆14Sep 12, 2019Updated 6 years ago
- Systolic array based hardware for Image processing on the SPARTAN-6 FPGA☆13May 26, 2016Updated 10 years ago
- Sata 2 Host Controller for FPGA implementation☆18Oct 11, 2017Updated 8 years ago
- ☆11Jan 21, 2019Updated 7 years ago
- STUN client for Android☆18May 17, 2014Updated 12 years ago