ic-lab-duth / NoCpad
HLS for Networks-on-Chip
☆34Updated 4 years ago
Alternatives and similar repositories for NoCpad:
Users that are interested in NoCpad are comparing it to the libraries listed below
- ☆26Updated 5 years ago
- Prototype-network-on-chip (ProNoC) is an EDA tool that facilitates prototyping of custom heterogeneous NoC-based many-core-SoC (MCSoC).☆56Updated last month
- An example of using Ramulator as memory model in a cycle-accurate SystemC Design☆49Updated 7 years ago
- ☆25Updated last year
- General Purpose AXI Direct Memory Access☆49Updated 11 months ago
- ☆46Updated 6 years ago
- Contains FPGA benchmarks for Vivado HLS and Catapult HLS☆25Updated 4 years ago
- Ratatoskr NoC Simulator☆24Updated 4 years ago
- cycle accurate Network-on-Chip Simulator☆27Updated 2 years ago
- Development of a Network on Chip Simulation using SystemC.☆31Updated 7 years ago
- SAURIA (Systolic-Array tensor Unit for aRtificial Intelligence Acceleration) is an open-source Convolutional Neural Network accelerator b…☆40Updated 7 months ago
- ☆32Updated 6 years ago
- NoC (Network-on-Chip) generator that generates Verilog HDL model of NoC consisting of on-chip routers☆62Updated 5 years ago
- Transactional Verilog design and Verilator Testbench for a RISC-V TensorCore Vector co-processor for reproducible linear algebra☆53Updated 3 years ago
- eyeriss-chisel3☆40Updated 3 years ago
- Project repo for the POSH on-chip network generator☆45Updated last month
- 32 - bit floating point Multiplier Accumulator Unit (MAC)☆30Updated 4 years ago
- LCAI-TIHU HW is an AI inference processor which is comprised of RISC-V cpu, nvdla, NoC bus, PCIe module, DDR, SRAM, bootROM, DMA and peri…☆37Updated 2 years ago
- ☆27Updated 4 years ago
- 128KB AXI cache (32-bit in, 256-bit out)☆48Updated 3 years ago
- Advanced Architecture Labs with CVA6☆58Updated last year
- ☆55Updated 4 years ago
- PiDRAM is the first flexible end-to-end framework that enables system integration studies and evaluation of real Processing-using-Memory …☆65Updated last year
- BlackParrot on Zynq☆39Updated 2 months ago
- SystemC training aimed at TLM.☆28Updated 4 years ago
- Xilinx AXI VIP example of use☆38Updated 4 years ago
- FlexASR: A Reconfigurable Hardware Accelerator for Attention-based Seq-to-Seq Networks☆45Updated 2 months ago
- ☆11Updated this week
- DUTH RISC-V Microprocessor☆18Updated 5 months ago
- The Verilog source code for DRUM approximate multiplier.☆30Updated 2 years ago