ic-lab-duth / NoCpadLinks
HLS for Networks-on-Chip
☆38Updated 4 years ago
Alternatives and similar repositories for NoCpad
Users that are interested in NoCpad are comparing it to the libraries listed below
Sorting:
- NoC (Network-on-Chip) generator that generates Verilog HDL model of NoC consisting of on-chip routers☆73Updated 5 years ago
- Prototype-network-on-chip (ProNoC) is an EDA tool that facilitates prototyping of custom heterogeneous NoC-based many-core-SoC (MCSoC).☆60Updated last week
- ☆28Updated 6 years ago
- ☆39Updated 6 years ago
- Ratatoskr NoC Simulator☆29Updated 4 years ago
- SAURIA (Systolic-Array tensor Unit for aRtificial Intelligence Acceleration) is an open-source Convolutional Neural Network accelerator b…☆75Updated 3 weeks ago
- ☆57Updated 6 years ago
- LCAI-TIHU HW is an AI inference processor which is comprised of RISC-V cpu, nvdla, NoC bus, PCIe module, DDR, SRAM, bootROM, DMA and peri…☆44Updated 2 years ago
- Development of a Network on Chip Simulation using SystemC.☆33Updated 8 years ago
- ☆79Updated 11 years ago
- Public release☆58Updated 6 years ago
- A verilog implementation for Network-on-Chip☆78Updated 7 years ago
- ☆31Updated 5 years ago
- ☆37Updated 2 months ago
- eyeriss-chisel3☆40Updated 3 years ago
- Xilinx AXI VIP example of use☆42Updated 4 years ago
- ☆66Updated 3 years ago
- General Purpose AXI Direct Memory Access☆61Updated last year
- Template for project1 TPU☆21Updated 4 years ago
- 本工具用于自动生成一个Wallace Tree算法VerilogHDL代码实例,并附带了一些配套的工具和一个完整的VerilogHDL描述的乘法器。☆27Updated 2 years ago
- An example of using Ramulator as memory model in a cycle-accurate SystemC Design☆55Updated 8 years ago
- Project repo for the POSH on-chip network generator☆52Updated 9 months ago
- Network on-Chip (NoC) simulator for simulating intra-chip data flow in Neural Network Accelerator☆35Updated 2 years ago
- 128KB AXI cache (32-bit in, 256-bit out)☆55Updated 4 years ago
- Implementation of the pipelined RISC V processor with many useful features as fully bypassing, dynamic branch prediction, single and mult…☆17Updated last year
- Design and UVM-TB of RISC -V Microprocessor☆32Updated last year
- 16-bit Adder Multiplier hardware on Digilent Basys 3☆83Updated 2 years ago
- 32 - bit floating point Multiplier Accumulator Unit (MAC)☆33Updated 4 years ago
- ☆19Updated 7 months ago
- Advanced Architecture Labs with CVA6☆71Updated last year