A configurable general purpose graphics processing unit for
☆12May 18, 2019Updated 6 years ago
Alternatives and similar repositories for configgpgpu
Users that are interested in configgpgpu are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Matrix Multiply and Accumulate unit written in System Verilog☆13Feb 7, 2019Updated 7 years ago
- Functional Verification the MMU (Memory Management Unit) of a multiprocessor with Data Cache and Instruction Cache☆13Nov 9, 2015Updated 10 years ago
- ☆13Apr 1, 2017Updated 8 years ago
- ☆14Feb 24, 2025Updated last year
- RISC-V vector and tensor compute extensions for Vortex GPGPU acceleration for ML workloads. Optimized for transformer models, CNNs, and g…☆22Apr 25, 2025Updated 11 months ago
- Wordpress hosting with auto-scaling on Cloudways • AdFully Managed hosting built for WordPress-powered businesses that need reliable, auto-scalable hosting. Cloudways SafeUpdates now available.
- ☆13Jul 28, 2022Updated 3 years ago
- An Open Source Link Protocol and Controller☆28Aug 1, 2021Updated 4 years ago
- a scaleable ring topology network on chip (NoC) implemented in BSV☆12Oct 14, 2014Updated 11 years ago
- VHDL description of the custom Demolicious GPU. Built during a single semester at NTNU☆39Jan 31, 2017Updated 9 years ago
- Ratatoskr NoC Simulator☆29Apr 13, 2021Updated 4 years ago
- System on Chip with RISCV-32 / RISCV-64 / RISCV-128☆22Updated this week
- Reusable image processing modules in SystemVerilog☆33Aug 7, 2017Updated 8 years ago
- tinyGPU: A Predicated-SIMD processor implementation in SystemVerilog☆64Jul 14, 2021Updated 4 years ago
- 5-stage RISC-V core (RV32IM) with pipelining designed for educational purposes by RPTU Kaiserslautern, Germany☆13Dec 4, 2025Updated 3 months ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click and start building anything your business needs.
- Generic AHB master stub☆12Jul 17, 2014Updated 11 years ago
- ☆10Dec 15, 2023Updated 2 years ago
- ☆21Sep 26, 2025Updated 6 months ago
- OpenExSys_NoC a mesh-based network on chip IP.☆20Dec 1, 2023Updated 2 years ago
- ☆16May 10, 2019Updated 6 years ago
- The RTL source for AnyCore RISC-V☆33Mar 18, 2022Updated 4 years ago
- SoC based on RISC V ISA☆10Apr 22, 2022Updated 3 years ago
- VM-HDL Co-Simulation for Servers with PCIe-Connected FPGAs☆52Jan 19, 2021Updated 5 years ago
- ☆21May 13, 2025Updated 10 months ago
- NordVPN Special Discount Offer • AdSave on top-rated NordVPN 1 or 2-year plans with secure browsing, privacy protection, and support for for all major platforms.
- 标准视频时序生成器☆10Feb 9, 2020Updated 6 years ago
- SPIR-V fragment shader GPU core based on RISC-V☆44May 26, 2021Updated 4 years ago
- Gemini 30F2 (30F3 variant 00) MIPS Processor for NSCSCC2022☆11Sep 21, 2022Updated 3 years ago
- Verilog-Based-NoC-Simulator☆10May 4, 2016Updated 9 years ago
- Open-source AI Accelerator Stack integrating compute, memory, and software — from RTL to PyTorch.☆25Updated this week
- LIS Network-on-Chip Implementation☆34Aug 29, 2016Updated 9 years ago
- Linux on RISC-V on FPGA (LOROF): RV64GC Sv39 Quad-Core Superscalar Out-of-Order Virtual Memory CPU☆17Feb 23, 2026Updated last month
- Verilog code that does 2D Low Pass Filter on a greyscale image☆10Sep 22, 2015Updated 10 years ago
- Multi-Processor System on Chip with RISCV-32 / RISCV-64 / RISCV-128☆13Mar 18, 2026Updated last week
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- ☆17Dec 21, 2020Updated 5 years ago
- FIR,FFT based on Verilog☆14Dec 3, 2017Updated 8 years ago
- AXI DMA Check: A utility to measure DMA speeds in simulation☆15Jan 22, 2025Updated last year
- OpenExSys_CoherentCache a directory-based MESI protocol coherent cache IP.☆22Mar 25, 2025Updated last year
- 位宽和深度可定制的异步FIFO☆14May 29, 2024Updated last year
- ☆12Nov 11, 2015Updated 10 years ago
- Formal Verification of RISC V IM Processor☆10Mar 27, 2022Updated 4 years ago