Support Repository of "How to make RISC-V Microcomputer using FPGA for programmer"
☆18Jul 30, 2019Updated 7 years ago
Alternatives and similar repositories for homemade-riscv-en
Users that are interested in homemade-riscv-en are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆30Mar 13, 2025Updated last year
- An almost empty chisel project as a starting point for hardware design☆39Jan 27, 2025Updated last year
- Hardware design with Chisel☆36Feb 9, 2023Updated 3 years ago
- An implementation of the Sodor 1-Stage RISC-V processor in SpinalHDL.☆14Jun 5, 2019Updated 7 years ago
- Space invaders hardware clone on the DE2-115 FPGA dev board with a USB keyboard and VGA output.☆13Feb 16, 2020Updated 6 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Implementation of the Snappy compression algorithm as a RoCC accelerator☆12Jul 29, 2019Updated 7 years ago
- Provides dot visualizations of chisel/firrtl circuites☆13Mar 12, 2019Updated 7 years ago
- An example of on-boarding a PIO block in with duh and wake☆12Nov 18, 2020Updated 5 years ago
- RISC-V CPU in SystemVerilog & Custom Migen-based SoC Generator☆11Dec 29, 2021Updated 4 years ago
- This repo contains source files and code for a synthesizable RISC-V processor with support for custom instructions in a co-processor.☆12Aug 19, 2018Updated 8 years ago
- A DMA Controller for RISCV CPUs☆13Aug 10, 2015Updated 11 years ago
- My MSc Thesis: Low Latency Router Microarchitecture for Network-on-Chip Implemented on an FPGA☆13Jun 26, 2018Updated 8 years ago
- Designed a pipelined calculation engine to read input/weights of neuron and compute/store results in SystemVerilog. Implemented fabric to…☆12Feb 12, 2019Updated 7 years ago
- Provides various testers for chisel users☆101Jan 12, 2023Updated 3 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Build script to compile an up-to-date RISC-V GCC toolchain on Debian / Ubuntu with rv32e, rv32i and rv64i architectures and ilp32e, ilp3…☆11Jul 17, 2026Updated 3 months ago
- QCX FT8 transmission suite☆15Mar 26, 2020Updated 6 years ago
- A simple AXI4 DMA unit written in SpinalHDL.☆18Apr 18, 2020Updated 6 years ago
- Verilog RTL Implementation of DNN☆10Jun 26, 2018Updated 8 years ago
- Xilinx JTAG Toolchain on Digilent Arty board☆17Mar 15, 2018Updated 8 years ago
- ☆16Apr 21, 2019Updated 7 years ago
- Another tiny RISC-V implementation☆68Jul 19, 2021Updated 5 years ago
- ESP32 version of the uSDX transceiver☆13Jul 6, 2022Updated 4 years ago
- RISC-V Rocket Chip Strap-on-Booster with Fused Universal Neural Network (FuNN) eNNgine☆21Mar 17, 2022Updated 4 years ago
- Serverless GPU API endpoints on Runpod - Get Bonus Credits • AdSkip the infrastructure headaches. Auto-scaling, pay-as-you-go, no-ops approach lets you focus on innovating your application.
- Nengo extension to connect to FPGAs☆18Aug 2, 2026Updated 2 months ago
- CNN accelerator using NoC architecture☆18Dec 6, 2018Updated 7 years ago
- High Throughput Image Filters on FPGAs☆13Oct 17, 2017Updated 9 years ago
- A picorv32 RISC-V processor with some very simple memory and peripherals. For Terasic DE-0 Nano☆13Apr 15, 2019Updated 7 years ago
- Notes on the Eclypse Z7 development board☆17Apr 9, 2026Updated 6 months ago
- Andes Vector Extension support added to riscv-dv☆19May 29, 2020Updated 6 years ago
- Chisel wrapper and accelerators for Columbia's Embedded Scalable Platform (ESP)☆25Feb 1, 2020Updated 6 years ago
- NeTV2 SoC based on LiteX☆17Jul 17, 2018Updated 8 years ago
- Generate a Verilog Source file and testbench file for a given Moore FSM☆17Nov 18, 2012Updated 13 years ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- Fault Injection Automatic Test Equipment☆17Nov 22, 2021Updated 4 years ago
- Building a busybox based RiscV 64-bit GNU/Linux system from scratch☆52Jun 13, 2019Updated 7 years ago
- This is my first trial project for designing RISC-V in Chisel☆17Apr 29, 2024Updated 2 years ago
- ☆111Oct 19, 2018Updated 8 years ago
- Python script for QPSK modulation and demodulation☆12May 27, 2020Updated 6 years ago
- A Chisel verison of the tiny-gpu project, with more verification codes than original implementation☆14Jan 22, 2025Updated last year
- Bridges ADALM-PLUTO SDR to RFSPACE SpectraVue Software in CloudSDR mode☆15Feb 19, 2026Updated 8 months ago