Alternatives and similar repositories for chisel-testers

Users that are interested in chisel-testers are comparing it to the libraries listed below

• freechipsproject / diagrammer
  Provides dot visualizations of chisel/firrtl circuits
  ☆122Updated 2 years ago
• chipsalliance / treadle
  Chisel/Firrtl execution engine
  ☆153Updated last year
• ucb-bar / dsptools
  A Library of Chisel3 Tools for Digital Signal Processing
  ☆242Updated last year
• ucb-bar / testchipip
  ☆87Updated last week
• ucb-bar / chiseltest
  The batteries-included testing and formal verification library for Chisel-based RTL designs.
  ☆232Updated last year
• ccelio / chisel-style-guide
  A Style Guide for the Chisel Hardware Construction Language
  ☆108Updated 4 years ago
• Intensivate / learning-journey
  Chisel Learning Journey
  ☆111Updated 2 years ago
• maltanar / fpga-tidbits
  Chisel components for FPGA projects
  ☆128Updated 2 years ago
• chiselverify / chiselverify
  A dynamic verification library for Chisel.
  ☆159Updated last year
• ucb-bar / hwacha
  Microarchitecture implementation of the decoupled vector-fetch accelerator
  ☆161Updated last year
• ovh / sv2chisel
  (System)Verilog to Chisel translator
  ☆117Updated 3 years ago
• ucb-bar / midas
  FPGA-Accelerated Simulation Framework Automatically Transforming Arbitrary RTL
  ☆101Updated 6 years ago
• bluespec / Toooba
  RISC-V Core; superscalar, out-of-order, multi-core capable; based on RISCY-OOO from MIT
  ☆181Updated 7 months ago
• freechipsproject / ip-contributions
  For contributions of Chisel IP to the chisel community.
  ☆70Updated last year
• schoeberl / chisel-examples
  Chisel examples and code snippets
  ☆263Updated 3 years ago
• carlosedp / chiselv
  A RISC-V Core (RV32I) written in Chisel HDL
  ☆105Updated last month
• ucb-bar / riscv-torture
  RISC-V Torture Test
  ☆204Updated last year
• SpinalHDL / SpinalTemplateSbt
  A basic SpinalHDL project
  ☆88Updated 4 months ago
• maltanar / axi-in-chisel
  Examples for creating AXI-interfaced peripherals in Chisel
  ☆76Updated 10 years ago
• freechipsproject / firrtl-interpreter
  A scala based simulator for circuits described by a LoFirrtl file
  ☆49Updated 2 years ago
• ucb-bar / chisel-gui
  A prototype GUI for chisel-development
  ☆51Updated 5 years ago
• pulp-platform / axi_riscv_atomics
  AXI Adapter(s) for RISC-V Atomic Operations
  ☆66Updated 2 weeks ago
• SpinalHDL / SpinalWorkshop
  Labs to learn SpinalHDL
  ☆151Updated last year
• chipsalliance / playground
  chipyard in mill :P
  ☆77Updated 2 years ago
• chipsalliance / rocket-tools
  Software tools that support rocket-chip (GNU toolchain, ISA simulator, tests)
  ☆59Updated 2 years ago
• ucb-bar / sha3
  ☆82Updated last year
• pulp-platform / iDMA
  A modular, parametrizable, and highly flexible Data Movement Accelerator (DMA)
  ☆189Updated 3 months ago
• seldridge / rocket-rocc-examples
  Tests for example Rocket Custom Coprocessors
  ☆75Updated 5 years ago
• freechipsproject / chisel-cheatsheet
  Chisel Cheatsheet
  ☆34Updated 2 years ago
• cnrv / fpga-rocket-chip
  Wrapper for Rocket-Chip on FPGAs
  ☆138Updated 3 years ago