An almost empty chisel project as a starting point for hardware design
☆39Jan 27, 2025Updated last year
Alternatives and similar repositories for chisel-empty
Users that are interested in chisel-empty are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Lab exercises for Chisel in the digital electronics 2 course at DTU☆237Jul 3, 2026Updated last month
- Chisel examples and code snippets☆284Aug 1, 2022Updated 4 years ago
- Lipsi: Probably the Smallest Processor in the World☆90Apr 15, 2024Updated 2 years ago
- Simple RISC-V 3-stage Pipeline in Chisel☆619Aug 9, 2024Updated 2 years ago
- An implementation of RISC-V☆54Jul 14, 2026Updated last month
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- Digital Design with Chisel☆929Jul 21, 2026Updated last month
- Hardware design with Chisel☆36Feb 9, 2023Updated 3 years ago
- ☆12Jan 19, 2022Updated 4 years ago
- The batteries-included testing and formal verification library for Chisel-based RTL designs.☆234Aug 19, 2024Updated 2 years ago
- IOPMP IP☆26Jul 11, 2025Updated last year
- ☆39Updated this week
- Provides various testers for chisel users☆101Jan 12, 2023Updated 3 years ago
- A configurable general purpose graphics processing unit for☆12May 18, 2019Updated 7 years ago
- Support Repository of "How to make RISC-V Microcomputer using FPGA for programmer"☆18Jul 30, 2019Updated 7 years ago
- Simple, predictable pricing with DigitalOcean hosting • AdAlways know what you'll pay with monthly caps and flat pricing. Enterprise-grade infrastructure trusted by 600k+ customers.
- Chisel implementation of Neural Processing Unit for System on the Chip☆35Aug 21, 2026Updated last week
- This project proposes a distributed communication protocol called MPIQ (Classical-Quantum Message Passing Interface) for the "classical +…☆15Apr 2, 2026Updated 4 months ago
- Provides dot visualizations of chisel/firrtl circuits☆123Apr 14, 2023Updated 3 years ago
- A tiny FP8 multiplication unit written in Verilog. TinyTapeout 2 submission.☆14Nov 23, 2022Updated 3 years ago
- A dynamic verification library for Chisel.☆163Nov 9, 2024Updated last year
- A series of RISC-V soft core processor written from scratch. Now, we're using all open-source toolchain (chisel, mill, verilator, NEMU, A…☆47Nov 8, 2023Updated 2 years ago
- ☆10Dec 15, 2023Updated 2 years ago
- For contributions of Chisel IP to the chisel community.☆73Nov 7, 2024Updated last year
- SDK Firmware infrastructure, contain RTOS Abstraction Layer, demos, SweRV Processor Support Package, and more ...☆33Dec 9, 2021Updated 4 years ago
- Proton VPN Special Offer - Get 70% off • AdSpecial partner offer. Trusted by over 100 million users worldwide. Tested, Approved and Recommended by Experts.
- A Style Guide for the Chisel Hardware Construction Language☆110Jul 16, 2021Updated 5 years ago
- A Tiny Processor Core☆117Jul 14, 2025Updated last year
- A DDR3 Controller that uses the Xilinx MIG-7 PHY to interface with DDR3 devices.☆12Aug 22, 2021Updated 5 years ago
- ☆11Jun 28, 2020Updated 6 years ago
- The home of the Chisel3 website☆21May 24, 2024Updated 2 years ago
- This is my graduation project, a simple processor soft core, which implements RV32I ISA.☆17May 23, 2019Updated 7 years ago
- A template project for beginning new Chisel work☆707Feb 24, 2026Updated 6 months ago
- Designed a pipelined calculation engine to read input/weights of neuron and compute/store results in SystemVerilog. Implemented fabric to…☆12Feb 12, 2019Updated 7 years ago
- Nix template for the chisel-based industrial designing flows.☆58Jul 21, 2026Updated last month
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Verilog implementation of a simple riscv cpu☆19Oct 28, 2021Updated 4 years ago
- ☆26Oct 24, 2022Updated 3 years ago
- Convert json descriptions of quant algorithms to verilog HDL.☆15Jul 3, 2020Updated 6 years ago
- SystemC simulator of a highly customizable Nostrum network-on-chip (NoC).☆14Apr 20, 2014Updated 12 years ago
- Hardware Accelerated MWPM decoder for Quantum Error Correction☆26Jul 12, 2026Updated last month
- verilog实现TPU中的脉动阵列计算卷积的module☆175May 10, 2025Updated last year
- ☆44Oct 21, 2025Updated 10 months ago