☆30Mar 13, 2025Updated last year
Alternatives and similar repositories for cc01
Users that are interested in cc01 are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Support Repository of "How to make RISC-V Microcomputer using FPGA for programmer"☆18Jul 30, 2019Updated 7 years ago
- ZC RISCV CORE☆12Dec 19, 2019Updated 6 years ago
- ☆24Sep 12, 2021Updated 5 years ago
- An Inventory of mostly open-source Soft Core Processors. Although many have FPGA stats, many do not.☆10Oct 12, 2026Updated 3 weeks ago
- A PicoRV32 SoC for the TinyFPGA BX with peripherals designed for building games☆14Nov 2, 2018Updated 8 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Implementation of the Snappy compression algorithm as a RoCC accelerator☆12Jul 29, 2019Updated 7 years ago
- Schematics, Gerbers, Bill of materials☆12Dec 3, 2015Updated 10 years ago
- A configurable general purpose graphics processing unit for☆12May 18, 2019Updated 7 years ago
- A Codex skill for evidence-grounded paper reading, reusable academic writing, literature synthesis, and research co-creation. 论文深读、写作迁移与研…☆15Oct 26, 2026Updated last week
- Chisel Examples for the iCESugar FPGA Board☆12May 4, 2021Updated 5 years ago
- A MATLAB function library containing encoders, decoders and weight enumerators for Reed-Muller codes.☆14Aug 19, 2023Updated 3 years ago
- zqh_riscv is an open source SOC system based on riscv core and tilelink NOC bus. coding with PHGL language(python DSL language). this pro…☆42Sep 21, 2021Updated 5 years ago
- An almost empty chisel project as a starting point for hardware design☆39Jan 27, 2025Updated last year
- A simple cycle accurate template model for ASIC/FPGA hardware design. Including a cycle accurate FIFO design example. More designs are co…☆17Sep 5, 2019Updated 7 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- NoC based MPSoC☆11Jul 17, 2014Updated 12 years ago
- My MSc Thesis: Low Latency Router Microarchitecture for Network-on-Chip Implemented on an FPGA☆13Jun 26, 2018Updated 8 years ago
- Hybrid Memory Cube Simulation & Research Infrastructure☆18Jun 9, 2025Updated last year
- ☆10Nov 12, 2019Updated 6 years ago
- coffeescript based hardware description language☆14Jan 14, 2022Updated 4 years ago
- Single issue, 5-stage pipeline LoongArch CPU. Supports forwarding, exception and interrupt handling, cache, TLB MMU, and a streamlined AX…☆10Sep 29, 2023Updated 3 years ago
- CasHMC: A Cycle-accurate Simulator for Hybrid Memory Cube☆24Aug 10, 2018Updated 8 years ago
- Ventus GPGPU ISA Simulator Based on Spike☆56Updated this week
- ☆12Apr 15, 2024Updated 2 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- ☆10Apr 28, 2023Updated 3 years ago
- ☆21Aug 23, 2021Updated 5 years ago
- ☆24Nov 4, 2021Updated 5 years ago
- Digital IC design and vlsi notes☆15Jun 24, 2020Updated 6 years ago
- RiftCore is a 9-stage, single-issue, out-of-order 64-bits RISC-V Core, which supports RV64IMC and 3-level Cache System☆45Sep 21, 2022Updated 4 years ago
- Final Project for Digital Systems Design Course, Fall 2020☆17Jul 20, 2022Updated 4 years ago
- An implementation of the decoding of BCH codes resistant to timing attacks☆11Sep 18, 2020Updated 6 years ago
- RTL implementation for Advanced Encryption Standard (AES) in Verilog. Synthesis Done in Synopsys DC.☆10Dec 11, 2020Updated 5 years ago
- Polar coding, decoding, and testing☆13Oct 11, 2023Updated 3 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- CNN accelerator using NoC architecture☆18Dec 6, 2018Updated 7 years ago
- Another tiny RISC-V implementation☆68Jul 19, 2021Updated 5 years ago
- ☆15Sep 27, 2022Updated 4 years ago
- This application estimate iterative decoding threshold using degree description, Stephan ten Brink. More general decription of LDPC codes…☆13Apr 28, 2023Updated 3 years ago
- ☆28Nov 15, 2019Updated 6 years ago
- Theia: ray graphic processing unit☆22Jul 17, 2014Updated 12 years ago
- The 3rd Iteration of the Berkeley RISC-V DMA Accelerator☆29Nov 21, 2019Updated 6 years ago