lingscale / cc01Links
☆31Updated 4 months ago
Alternatives and similar repositories for cc01
Users that are interested in cc01 are comparing it to the libraries listed below
Sorting:
- Basic floating-point components for RISC-V processors☆66Updated 5 years ago
- RiftCore is a 9-stage, single-issue, out-of-order 64-bits RISC-V Core, which supports RV64IMC and 3-level Cache System☆42Updated 2 years ago
- ☆36Updated 6 years ago
- Software tools that support rocket-chip (GNU toolchain, ISA simulator, tests)☆55Updated last year
- A series of RISC-V soft core processor written from scratch. Now, we're using all open-source toolchain (chisel, mill, verilator, NEMU, …☆41Updated last year
- a hardware design library based on SpinalHDL, especially for stream processing operators on Xilinx FPGAs for Arithmetic, DSP, Communicati…☆62Updated last year
- OpenXuantie - OpenE906 Core☆139Updated last year
- ☆33Updated 3 months ago
- Linux-capable superscalar out-of-order RISC core (with Cache& MMU) and SoC, having been verified on Xilinx Kintex-7 FPGA.☆55Updated 11 months ago
- ☆64Updated 2 years ago
- C/Assembly macros for talking with Rocket Custom Coprocessors (RoCCs)☆54Updated 5 years ago
- Open source high performance IEEE-754 floating unit☆77Updated last year
- PulseRain Reindeer - RISCV RV32I[M] Soft CPU☆128Updated 5 years ago
- ☆61Updated 4 years ago
- SDRAM controller with AXI4 interface☆94Updated 5 years ago
- a training-target implementation of rv32im, designed to be simple and easy to understand☆60Updated 3 years ago
- Chisel Learning Journey☆109Updated 2 years ago
- ☆66Updated 3 years ago
- HDL code for a DDR4 memory controller implementing an Open Page Policy and Out of Order execution.☆78Updated 7 years ago
- ☆29Updated 4 years ago
- The next generation integrated development environment for processor design and verification. It has multi-hardware language support, o…☆107Updated 2 years ago
- ☆18Updated 2 years ago
- 多核处理器 ;ring network , four core, shared space memory ,directory-based cache coherency☆25Updated 8 years ago
- Pure digital components of a UCIe controller☆64Updated this week
- Run rocket-chip on FPGA☆68Updated 8 months ago
- SSRV(Super-Scalar RISC-V) --- Super-scalar out-of-order RV32IMC CPU core, 6.4 CoreMark/MHz.☆217Updated 4 years ago
- SpinalHDL-tutorial based on Jupyter Notebook☆138Updated last year
- Port fpga-zynq (rocket-chip) to Xilinx ZYNQ Ultrascale+ board (ZCU102)☆62Updated 2 years ago
- IEEE 754 floating point unit in Verilog☆140Updated 9 years ago
- A SDCard Controller Based AXI4 Bus with SDIO 4-wire 50MHz Mode(Max Rate 23MB/s)☆121Updated 2 years ago