Alternatives and similar repositories for systolic-array:

Users that are interested in systolic-array are comparing it to the libraries listed below

• cwfletcher / buffets
  Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.
  ☆71Updated 6 years ago
• harvard-acc / FlexASR
  FlexASR: A Reconfigurable Hardware Accelerator for Attention-based Seq-to-Seq Networks
  ☆45Updated 2 months ago
• UCLA-VAST / FlexCNN
  ☆71Updated 2 years ago
• PolyArch / dsa-framework
  Release of stream-specialization software/hardware stack.
  ☆121Updated 2 years ago
• maeri-project / MAERI_bsv
  MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)
  ☆65Updated 3 years ago
• pku-liang / TensorLib
  A Spatial Accelerator Generation Framework for Tensor Algebra.
  ☆56Updated 3 years ago
• Xilinx / logicnets
  ☆91Updated 10 months ago
• StanfordAHA / aha
  ☆58Updated this week
• breagen / MachSuite
  Benchmarks for Accelerator Design and Customized Architectures
  ☆121Updated 5 years ago
• cornell-zhang / HiSparse
  High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS
  ☆90Updated 7 months ago
• pnnl / soda-opt
  ☆44Updated last month
• sld-columbia / hl5
  A 32-bit RISC-V Processor Designed with High-Level Synthesis
  ☆52Updated 5 years ago
• ucb-bar / gemmini-rocc-tests
  Fork of seldridge/rocket-rocc-examples with tests for a systolic array based matmul accelerator
  ☆59Updated 2 months ago
• linghaosong / Sextans
  An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).
  ☆79Updated 9 months ago
• lana555 / dynamatic
  ☆86Updated last year
• ecolab-nus / morpher
  An Open-Source Tool for CGRA Accelerators
  ☆64Updated 2 weeks ago
• KULeuven-MICAS / stream
  Multi-core HW accelerator mapping optimization framework for layer-fused ML workloads.
  ☆51Updated last week
• pku-liang / Hector
  A hardware synthesis framework with multi-level paradigm
  ☆38Updated 3 months ago
• UIUC-ChenLab / ScaleHLS-HIDA
  ☆50Updated last month
• VeriGOOD-ML / public
  ☆59Updated this week
• esl-epfl / OpenEdgeCGRA
  An Open-Hardware CGRA for accelerated computation on the edge.
  ☆24Updated 7 months ago
• ucb-bar / cosa
  A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)
  ☆79Updated last year
• awai54st / LUTNet
  ☆57Updated 4 years ago
• georgia-tech-synergy-lab / SIGMA
  RTL implementation of Flex-DPE.
  ☆99Updated 5 years ago
• sfu-arch / SpGEMM
  ☆35Updated 4 years ago
• pku-dasys / pillars
  An integrated CGRA design framework
  ☆88Updated last month
• TeCSAR-UNCC / gem5-SALAM
  ☆91Updated last year
• Accelergy-Project / accelergy-timeloop-infrastructure
  Linux docker for the DNN accelerator exploration infrastructure composed of Accelergy and Timeloop
  ☆52Updated 2 weeks ago
• stillwater-sc / RISC-V-TensorCore
  Transactional Verilog design and Verilator Testbench for a RISC-V TensorCore Vector co-processor for reproducible linear algebra
  ☆53Updated 3 years ago
• seldridge / rocket-rocc-examples
  Tests for example Rocket Custom Coprocessors
  ☆74Updated 5 years ago