ucb-bar / gemmini-rocc-testsLinks
Fork of seldridge/rocket-rocc-examples with tests for a systolic array based matmul accelerator
☆60Updated 5 months ago
Alternatives and similar repositories for gemmini-rocc-tests
Users that are interested in gemmini-rocc-tests are comparing it to the libraries listed below
Sorting:
- PiDRAM is the first flexible end-to-end framework that enables system integration studies and evaluation of real Processing-using-Memory …☆71Updated last year
- ☆61Updated this week
- A DSL for Systolic Arrays☆82Updated 6 years ago
- An LLVM pass that can generate CDFG and map the target loops onto a parameterizable CGRA.☆80Updated last week
- Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.☆82Updated 6 years ago
- Next generation CGRA generator☆116Updated this week
- Tests for example Rocket Custom Coprocessors☆75Updated 5 years ago
- Heterogeneous Research Platform (HERO) for exploration of heterogeneous computers consisting of programmable many-core accelerators and a…☆113Updated 2 years ago
- CGRA-Flow is an integrated framework for CGRA compilation, exploration, synthesis, and development.☆145Updated 2 weeks ago
- MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)☆65Updated 4 years ago
- Rosetta: A Realistic High-level Synthesis Benchmark Suite for Software Programmable FPGAs (FPGA'18)☆168Updated 2 years ago
- A 32-bit RISC-V Processor Designed with High-Level Synthesis☆54Updated 5 years ago
- An MLIR dialect to enable the efficient acceleration of ML model on CGRAs.☆64Updated last year
- Provides the hardware code for the paper "EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerator…☆24Updated 5 years ago
- ☆87Updated last year
- ☆38Updated 8 months ago
- ☆72Updated 2 years ago
- dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators☆47Updated 3 years ago
- ☆32Updated last year
- ☆64Updated 7 months ago
- An integrated CGRA design framework☆91Updated 8 months ago
- The RAD flow is an open-source academic architecture exploration and evaluation flow for novel beyond-FPGA reconfigurable acceleration de…☆38Updated 4 months ago
- [FPGA 2021, Best Paper Award] An automated floorplanning and pipelining tool for Vivado HLS.☆127Updated 2 years ago
- An Open-Source Tool for CGRA Accelerators☆76Updated 2 months ago
- FlexASR: A Reconfigurable Hardware Accelerator for Attention-based Seq-to-Seq Networks☆49Updated 9 months ago
- ☆107Updated last year
- ☆40Updated 8 months ago
- Dynamically Reconfigurable Architecture Template and Cycle-level Microarchitecture Simulator for Dataflow AcCelerators☆30Updated 2 years ago
- An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).☆91Updated last year
- ☆37Updated 4 years ago