Fork of seldridge/rocket-rocc-examples with tests for a systolic array based matmul accelerator
☆64Jun 27, 2025Updated 10 months ago
Alternatives and similar repositories for gemmini-rocc-tests
Users that are interested in gemmini-rocc-tests are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Custom extensions to the RISC-V isa simulator for the UCB-BAR ESP project☆17Nov 27, 2022Updated 3 years ago
- C/Assembly macros for talking with Rocket Custom Coprocessors (RoCCs)☆53Jul 14, 2020Updated 5 years ago
- Berkeley's Spatial Array Generator☆1,294Mar 29, 2026Updated last month
- Wrapper for ETH Ariane Core☆22Sep 2, 2025Updated 8 months ago
- Fork of upstream onnxruntime focused on supporting risc-v accelerators☆92Mar 26, 2023Updated 3 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Microarchitecture implementation of the decoupled vector-fetch accelerator☆166Jan 25, 2024Updated 2 years ago
- ☆90Apr 21, 2026Updated 2 weeks ago
- Wraps the NVDLA project for Chipyard integration☆23Sep 2, 2025Updated 8 months ago
- ☆29Oct 20, 2019Updated 6 years ago
- Implementation of the Snappy compression algorithm as a RoCC accelerator☆12Jul 29, 2019Updated 6 years ago
- Deep Learning Accelerator Based on Eyeriss V2 Architecture with custom RISC-V extended instructions☆208Jun 25, 2020Updated 5 years ago
- vector multiplication adder accelerator (using chisel 3 and RocketChip RoCC ) 向量乘法累加加速器☆53Apr 6, 2020Updated 6 years ago
- Provides dot visualizations of chisel/firrtl circuites☆13Mar 12, 2019Updated 7 years ago
- An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).☆94Jul 26, 2024Updated last year
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- A DSL for Systolic Arrays☆85Dec 14, 2018Updated 7 years ago
- Virtualized Accelerator Orchestration for Multi-Tenant Workloads☆21Nov 17, 2024Updated last year
- Block-diagram style digital logic visualizer☆23Sep 16, 2015Updated 10 years ago
- Implementation of the Advanced Encryption Standard in Chisel☆19Apr 18, 2022Updated 4 years ago
- pulp_soc is the core building component of PULP based SoCs☆84Mar 10, 2025Updated last year
- A coverage library for Chisel designs☆11Mar 12, 2020Updated 6 years ago
- Standard HyperRAM core for ECP5 written in Litex/Migen☆14Dec 6, 2019Updated 6 years ago
- Multi-Processor System on Chip with RISCV-32 / RISCV-64 / RISCV-128☆13Apr 19, 2026Updated 2 weeks ago
- ASIC Design of the openSPARC Floating Point Unit☆15Mar 13, 2017Updated 9 years ago
- End-to-end encrypted email - Proton Mail • AdSpecial offer: 40% Off Yearly / 80% Off First Month. All Proton services are open source and independently audited for security.
- Floating point modules for CHISEL☆32Nov 2, 2014Updated 11 years ago
- A submodule of Chipyard https://github.com/ucb-bar/chipyard☆20Updated this week
- ☆81Feb 27, 2024Updated 2 years ago
- Hammer: Highly Agile Masks Made Effortlessly from RTL☆315Mar 6, 2026Updated last month
- RocketChip RoCC Accelerator template (Risc-V, Chisel )(加速器开发项目框架)☆15Sep 5, 2019Updated 6 years ago
- Heterogenous ML accelerator☆22May 5, 2025Updated 11 months ago
- ☆35Nov 6, 2024Updated last year
- ☆372Sep 12, 2025Updated 7 months ago
- su su su supernova☆25Jan 9, 2025Updated last year
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- Wrappers for open source FPU hardware implementations.☆37Nov 27, 2025Updated 5 months ago
- An experimental LLVM pass plugin that allows you to apply the State of the Art function merging techniques☆16Feb 8, 2025Updated last year
- Software workload management tool for RISC-V based SoC research. This is the default workload management tool for Chipyard and FireSim.☆89Mar 17, 2026Updated last month
- ☆16Sep 15, 2023Updated 2 years ago
- ☆23Feb 18, 2025Updated last year
- Tests for example Rocket Custom Coprocessors☆75Feb 19, 2020Updated 6 years ago
- Single, dual, quad, eight, and sixteen-shader GP-GPU-Compute engines, along with 32-bit SYMPL RISC CPU and Coarse-Grained Scheduler, in o…☆22Jan 2, 2019Updated 7 years ago