da-steve101 / radio_modulationLinks
Classify modulation of signals
☆15Updated 5 years ago
Alternatives and similar repositories for radio_modulation
Users that are interested in radio_modulation are comparing it to the libraries listed below
Sorting:
- ☆109Updated 6 years ago
- Generate an FPGA design for a TWN☆10Updated 6 years ago
- Educational verilog library that supports IEEE754 floating point arithmetic with a parametrizable mantissa and exponent☆29Updated 8 months ago
- ☆19Updated 4 years ago
- Matrix Operation Library for FPGA https://xilinx.github.io/gemx/☆63Updated 6 years ago
- Algorithmic C Math Library☆65Updated 2 weeks ago
- A collection of RFSoC introductory notebooks for PYNQ.☆24Updated 4 years ago
- ☆63Updated 5 years ago
- MaxEVA: Maximizing the Efficiency of Matrix Multiplication on Versal AI Engine (accepted as full paper at FPT'23)☆22Updated last year
- PYNQ Composabe Overlays☆73Updated last year
- The Verilog source code for DRUM approximate multiplier.☆31Updated 2 years ago
- Contains FPGA benchmarks for Vivado HLS and Catapult HLS☆26Updated 5 years ago
- A PYNQ overlay demonstrating Pythonic DSP running on Zynq UltraScale+☆40Updated 3 years ago
- RISC-V ISA based 32-bit processor written in HLS☆16Updated 6 years ago
- Tutorials on HLS Design☆52Updated 5 years ago
- Train and deploy LUT-based neural networks on FPGAs☆101Updated last year
- Introductory examples for using PYNQ with Alveo☆52Updated 2 years ago
- Hand-written HDL code and C-based HLS designs for K-means clustering implementations on FPGAs☆48Updated 8 years ago
- CORDIC VLSI-IP for deep learning activation functions☆15Updated 6 years ago
- ☆16Updated 4 years ago
- CNN accelerator☆27Updated 8 years ago
- 2-8bit weights, 8-bit activations flexible Neural Processing Engine for PULP clusters☆27Updated this week
- Fast inference of Boosted Decision Trees in FPGAs☆57Updated 2 weeks ago
- Verilog Forward Error Correction Archive: BOX-Muller for fast AWGN generation, Universal Demapper from BPSK to QAM-512, different Forward…☆77Updated 2 years ago
- Gaussian noise generator Verilog IP core☆32Updated 2 years ago
- This repository contains the hardware implementation for Static BFP convolution on FPGA☆10Updated 6 years ago
- Linear model training using stochastic gradient descent (SGD) on PYNQ with full to low precision.☆55Updated 7 years ago
- The Strathclyde RFSoC Studio Installer for PYNQ.☆34Updated 2 years ago
- ☆40Updated 5 years ago
- Real-Time Image Processing for ASIC/FGPA☆21Updated 3 years ago