Alternatives and similar repositories for reticle

Users that are interested in reticle are comparing it to the libraries listed below

• cucapra / dahlia
  Time-sensitive affine types for predictable hardware generation
  ☆146Updated 3 weeks ago
• gussmith23 / lakeroad
  FPGA synthesis tool powered by program synthesis
  ☆52Updated last month
• apl-cornell / PDL
  A Hardware Pipeline Description Language
  ☆49Updated 4 months ago
• David-Durst / embeddedHaskellAetherling
  ☆30Updated 3 years ago
• vegaluisjose / vast
  Verilog AST
  ☆21Updated 2 years ago
• ymherklotz / vericert
  A formally verified high-level synthesis tool based on CompCert and written in Coq.
  ☆96Updated 2 months ago
• cucapra / latte21
  Languages, Tools, and Techniques for Accelerator Design
  ☆33Updated 4 years ago
• rdaly525 / coreir
  ☆104Updated 3 years ago
• mikeurbach / egg-netlist-synthesizer
  Using e-graphs to synthesize netlists from boolean logic.
  ☆14Updated 2 years ago
• mit-plv / koika
  A core language for rule-based hardware design 🦑
  ☆165Updated last month
• gussmith23 / glenside
  A pure, low-level tensor program representation enabling tensor program optimization via program rewriting. See the web demo at https://g…
  ☆71Updated 6 months ago
• agurfinkel / btor2mlir
  BTOR2 MLIR project
  ☆26Updated last year
• TeamVoss / VossII
  The source code to the Voss II Hardware Verification Suite
  ☆56Updated this week
• David-Durst / aetherling
  Create auto-scheduled data-parallel pipelines in hardware with user-friendly Python
  ☆13Updated 4 years ago
• johnwickerson / memalloy
  Memory consistency modelling using Alloy
  ☆31Updated 4 years ago
• uwplse / rake
  compiling DSLs to high-level hardware instructions
  ☆23Updated 3 years ago
• dillonhuff / clockwork
  A polyhedral compiler for hardware accelerators
  ☆59Updated last year
• circt / arc-tests
  A collection of tests and benchmarks for the Arc simulation backend of CIRCT
  ☆32Updated 3 months ago
• circt-hls / circt-hls
  CIRCT-based HLS compilation flows, debugging, and cosimulation tools.
  ☆52Updated 2 years ago
• cristian-mattarei / CoSA
  CoreIR Symbolic Analyzer
  ☆74Updated 5 years ago
• UCSBarchlab / Charm
  A Language for Closed-form High-level ARchitecture Modeling
  ☆21Updated 5 years ago
• PrincetonUniversity / IMDb-Archive
  ILA Model Database
  ☆24Updated 5 years ago
• cornell-zhang / hcl-dialect
  HeteroCL-MLIR dialect for accelerator design
  ☆42Updated last year
• pku-liang / Cement
  The Next-gen Language & Compiler Powering Efficient Hardware Design
  ☆34Updated 10 months ago
• rsnikhil / Bluespec_BSV_Tutorial
  Bluespec BSV HLHDL tutorial
  ☆110Updated 9 years ago
• mit-plv / kami
  A Platform for High-Level Parametric Hardware Specification and its Modular Verification
  ☆161Updated 2 weeks ago
• cucapra / diospyros
  Search-based compiler for high-performance DSP programming
  ☆69Updated last year
• PrincetonUniversity / ILAng
  A Modeling and Verification Platform for SoCs using ILAs
  ☆81Updated last year
• CTSRD-CHERI / bluecheck
  A generic test bench written in Bluespec
  ☆56Updated 4 years ago
• POETSII / tinsel
  Manythread RISC-V overlay for FPGA clusters
  ☆38Updated 2 months ago