freechipsproject / chisel-cheatsheetLinks
Chisel Cheatsheet
☆35Updated 2 years ago
Alternatives and similar repositories for chisel-cheatsheet
Users that are interested in chisel-cheatsheet are comparing it to the libraries listed below
Sorting:
- For contributions of Chisel IP to the chisel community.☆70Updated last year
- (System)Verilog to Chisel translator☆116Updated 3 years ago
- AXI Adapter(s) for RISC-V Atomic Operations☆66Updated last month
- ☆90Updated this week
- A Style Guide for the Chisel Hardware Construction Language☆109Updated 4 years ago
- Proposed RISC-V Composable Custom Extensions Specification☆70Updated 7 months ago
- A prototype GUI for chisel-development☆51Updated 5 years ago
- Setup scripts and files needed to compile CoreMark on RISC-V☆73Updated last year
- Heterogeneous Research Platform (HERO) for exploration of heterogeneous computers consisting of programmable many-core accelerators and a…☆114Updated 2 years ago
- ☆33Updated 10 months ago
- Provides various testers for chisel users☆100Updated 3 years ago
- A Rocket-based RISC-V superscalar in-order core☆38Updated 4 months ago
- Examples for creating AXI-interfaced peripherals in Chisel☆75Updated 10 years ago
- A lightweight core for the CV32E40 implementing the RISC-V vector extension specification. (v0.8)☆35Updated 5 years ago
- The CORE-V CVA5 is an Application class 5-stage RISC-V CPU specifically targetting FPGA implementations.☆127Updated 6 months ago
- CHIPKIT: An agile, reusable open-source framework for rapid test chip development☆42Updated 5 years ago
- ☆41Updated 2 months ago
- Original RISC-V 1.0 implementation. Not supported.☆42Updated 7 years ago
- Hardware design with Chisel☆35Updated 3 years ago
- ☆82Updated last year
- Chisel components for FPGA projects☆128Updated 2 years ago
- Basic floating-point components for RISC-V processors☆67Updated 6 years ago
- Technology dependent cells instantiated in the design for generic process (simulation, FPGA)☆80Updated this week
- chipyard in mill :P☆77Updated 2 years ago
- pulp_soc is the core building component of PULP based SoCs☆82Updated 10 months ago
- Lipsi: Probably the Smallest Processor in the World☆89Updated last year
- An implementation of RISC-V☆47Updated last month
- Facilitates building open source tools for working with hardware description languages (HDLs)☆66Updated 6 years ago
- high-performance RTL simulator☆186Updated last year
- A fault-injection framework using Chisel and FIRRTL☆36Updated 4 months ago