Chisel Cheatsheet
☆37Apr 13, 2023Updated 3 years ago
Alternatives and similar repositories for chisel-cheatsheet
Users that are interested in chisel-cheatsheet are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆13Feb 13, 2021Updated 5 years ago
- IPXACT packaging utilities for Chisel 3.x using Xilinx Vivado Design Suite.☆12Dec 5, 2018Updated 7 years ago
- ☆10Oct 15, 2021Updated 4 years ago
- (System)Verilog to Chisel translator☆121May 20, 2022Updated 4 years ago
- For contributions of Chisel IP to the chisel community.☆74Nov 7, 2024Updated last year
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- Chisel components for FPGA projects☆129Sep 19, 2023Updated 2 years ago
- Library to compile Chisel circuits using LLVM/MLIR (CIRCT)☆71Mar 2, 2023Updated 3 years ago
- A dynamic verification library for Chisel.☆163Nov 9, 2024Updated last year
- Hardware design with Chisel☆36Feb 9, 2023Updated 3 years ago
- Provides dot visualizations of chisel/firrtl circuits☆123Apr 14, 2023Updated 3 years ago
- The batteries-included testing and formal verification library for Chisel-based RTL designs.☆234Aug 19, 2024Updated last year
- CoreMark® is an industry-standard benchmark that measures the performance of central processing units (CPU) and embedded microcrontroller…☆11Jul 21, 2020Updated 6 years ago
- Drive a Wishbone master bus with an SPI bus.☆10Apr 24, 2025Updated last year
- ☆20Mar 3, 2026Updated 4 months ago
- End-to-end encrypted cloud storage - Proton Drive • AdSpecial offer: 40% Off Yearly / 80% Off First Month. Protect your most important files, photos, and documents from prying eyes.
- Verylup: the Veryl toolchain installer☆15Updated this week
- This repository is outdated and the related functionality has been migrated to https://github.com/easysoc/easysoc-firrtl☆11Nov 3, 2021Updated 4 years ago
- A Style Guide for the Chisel Hardware Construction Language☆109Jul 16, 2021Updated 5 years ago
- Chisel examples and code snippets☆285Aug 1, 2022Updated 3 years ago
- Digital Design with Chisel☆922Updated this week
- A DMA Controller for RISCV CPUs☆13Aug 10, 2015Updated 10 years ago
- ☆27Sep 3, 2020Updated 5 years ago
- Lectures for the Agile Hardware Design course in Jupyter Notebooks☆128Nov 10, 2025Updated 8 months ago
- ☆53Jan 9, 2026Updated 6 months ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- Xiangshan deterministic workloads generator☆28May 14, 2025Updated last year
- Chisel implementation of AES☆24Mar 27, 2020Updated 6 years ago
- Provides various testers for chisel users☆101Jan 12, 2023Updated 3 years ago
- Helper scripts used to clone RISC-V related git repos inside China.☆16Sep 17, 2020Updated 5 years ago
- The User Guide of XiangShan.☆21Jun 1, 2026Updated last month
- RocketChip RoCC Accelerator template (Risc-V, Chisel )(加速器开发项目框架)☆15Sep 5, 2019Updated 6 years ago
- Chisel artifacts developed under IBM's involvement with the DARPA PERFECT program☆31Sep 17, 2025Updated 10 months ago
- ☆13Jun 9, 2022Updated 4 years ago
- ☆11Apr 15, 2024Updated 2 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Simple RISC-V 3-stage Pipeline in Chisel☆617Aug 9, 2024Updated last year
- A RISC-V Core (RV32I) written in Chisel HDL☆109Jun 18, 2026Updated last month
- 👾 Design ∪ Hardware☆79Jul 1, 2026Updated 3 weeks ago
- The home of the Chisel3 website☆21May 24, 2024Updated 2 years ago
- Yosys RTLIL dialect for MLIR☆23Jun 12, 2025Updated last year
- 哈尔滨工业大学(深圳)2021年球季学期深度学习体系结构实验☆17Oct 1, 2022Updated 3 years ago
- A programming language for FPGAs.☆19May 5, 2018Updated 8 years ago