fpgasystems / Vitis_with_100Gbps_TCP-IPView external linksLinks
100 Gbps TCP/IP stack for Vitis shells
☆228Apr 23, 2024Updated last year
Alternatives and similar repositories for Vitis_with_100Gbps_TCP-IP
Users that are interested in Vitis_with_100Gbps_TCP-IP are comparing it to the libraries listed below
Sorting:
- VNx: Vitis Network Examples☆156Aug 25, 2025Updated 5 months ago
- Scalable Network Stack for FPGAs (TCP/IP, RoCEv2)☆895Updated this week
- Framework providing operating system abstractions and a range of shared networking and memory services for common modern heterogeneous pl…☆323Updated this week
- Limago: an FPGA-based Open-source 100 GbE TCP/IP Stack☆134Sep 11, 2021Updated 4 years ago
- AMD OpenNIC Shell includes the HDL source files☆136Jan 2, 2025Updated last year
- Alveo Collective Communication Library: MPI-like communication operations for Xilinx Alveo accelerators☆101Jun 30, 2025Updated 7 months ago
- This repo contains the Limago code☆91May 8, 2025Updated 9 months ago
- Heterogeneous Accelerated Computed Cluster (HACC) Resources Page☆22Oct 7, 2025Updated 4 months ago
- Hands-on experience using the Vitis unified software platform with Xilinx FPGA hardware☆48Jul 24, 2024Updated last year
- AMD OpenNIC Project Overview☆303Dec 20, 2022Updated 3 years ago
- Checksum plays a key role in the TCP/IP headers. In this repo you'll find a efficient FPGA-based solution for a 512-bit AXI4-Stream inter…☆18Aug 28, 2019Updated 6 years ago
- Open source FPGA-based NIC and platform for in-network compute☆2,206Jul 5, 2024Updated last year
- [FPGA 2021, Best Paper Award] An automated floorplanning and pipelining tool for Vivado HLS.☆127Jan 3, 2023Updated 3 years ago
- This repository contains IPs, Vitis kernels and software APIs that can be leveraged by Vitis users to build scale-out solutions on multip…☆23Apr 27, 2023Updated 2 years ago
- A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.☆334Jan 20, 2025Updated last year
- ☆24Dec 1, 2020Updated 5 years ago
- ☆49Dec 10, 2019Updated 6 years ago
- Introductory examples for using PYNQ with Alveo☆52Mar 14, 2023Updated 2 years ago
- SmartNIC☆14Dec 13, 2018Updated 7 years ago
- Distributed Accelerator OS☆63Apr 6, 2022Updated 3 years ago
- Vitis_Accel_Examples☆582Dec 17, 2025Updated last month
- ☆59Oct 29, 2020Updated 5 years ago
- Run Time for AIE and FPGA based platforms☆650Updated this week
- AMD OpenNIC driver includes the Linux kernel driver☆72Jan 3, 2025Updated last year
- An FPGA-based NetTLP adapter☆27Mar 10, 2020Updated 5 years ago
- For publishing the source for UG1352 "Get Moving with Alveo"☆50Jun 17, 2020Updated 5 years ago
- ☆19Sep 15, 2021Updated 4 years ago
- ☆20Jul 28, 2021Updated 4 years ago
- RecoNIC is a software/hardware shell used to enable network-attached processing within an RDMA-featured SmartNIC for scale-out computing.☆160Mar 20, 2025Updated 10 months ago
- NVMe Controller featuring Hardware Acceleration☆101Jun 23, 2021Updated 4 years ago
- TAPA compiles task-parallel HLS program into high-performance FPGA accelerators. UCLA-maintained.☆180Aug 16, 2025Updated 5 months ago
- Build Customized FPGA Implementations for Vivado☆355Updated this week
- Open source FPGA-based NIC and platform for in-network compute☆205May 4, 2024Updated last year
- SDAccel Examples☆361May 20, 2022Updated 3 years ago
- ☆21Dec 9, 2018Updated 7 years ago
- A novel spatial accelerator for horizontal diffusion weather stencil computation, as described in ICS 2023 paper by Singh et al. (https:/…☆22Jul 27, 2023Updated 2 years ago
- ☆36Jan 21, 2021Updated 5 years ago
- AI Accelerators-SC23-tutorial Repository☆11Nov 12, 2023Updated 2 years ago
- Caribou: Distributed Smart Storage built with FPGAs☆68Jul 25, 2018Updated 7 years ago