Xilinx / RecoNICLinks
RecoNIC is a software/hardware shell used to enable network-attached processing within an RDMA-featured SmartNIC for scale-out computing.
☆148Updated 7 months ago
Alternatives and similar repositories for RecoNIC
Users that are interested in RecoNIC are comparing it to the libraries listed below
Sorting:
- AMD OpenNIC Shell includes the HDL source files☆127Updated 9 months ago
- AMD OpenNIC driver includes the Linux kernel driver☆69Updated 9 months ago
- Framework for FPGA-accelerated Middlebox Development☆46Updated 2 years ago
- VNx: Vitis Network Examples☆154Updated 2 months ago
- FpgaNIC is an FPGA-based Versatile 100Gb SmartNIC for GPUs [ATC 22]☆133Updated 2 years ago
- ☆74Updated 2 months ago
- Framework providing operating system abstractions and a range of shared networking and memory services for common modern heterogeneous pl…☆300Updated this week
- ☆53Updated last year
- PsPIN: A RISC-V in-network accelerator for flexible high-performance low-power packet processing☆104Updated 2 years ago
- AMD OpenNIC Project Overview☆285Updated 2 years ago
- This repo contains the Limago code☆87Updated 5 months ago
- Shuhai is a benchmarking-memory tool that allows FPGA programmers to demystify all the underlying details of memories, e.g., HBM and DDR4…☆117Updated 4 months ago
- For publishing the source for UG1352 "Get Moving with Alveo"☆50Updated 5 years ago
- 100 Gbps TCP/IP stack for Vitis shells☆218Updated last year
- ☆51Updated 3 years ago
- A Programmable Hardware Architecture for Network Transport Logic☆35Updated 3 years ago
- Distributed Accelerator OS☆64Updated 3 years ago
- ☆26Updated 4 years ago
- ☆69Updated 8 months ago
- ESnet SmartNIC hardware design repository.☆58Updated 2 weeks ago
- RoCE v2 hardware and software implementation☆164Updated last year
- Limago: an FPGA-based Open-source 100 GbE TCP/IP Stack☆132Updated 4 years ago
- ☆15Updated 2 years ago
- Source Code for the paper Titled FASTHash: FPGA-Based High Throughput Parallel Hash Table published in ISC high performance 2020☆25Updated 3 years ago
- Orignal code/dev history for Menshen paper (NSDI 2022), see https://github.com/multitenancy-project/menshen for official version.☆29Updated 3 years ago
- ☆35Updated 9 years ago
- A Fast, Scalable and Programmable Packet Scheduler in Hardware☆38Updated 6 years ago
- This repository contains IPs, Vitis kernels and software APIs that can be leveraged by Vitis users to build scale-out solutions on multip…☆22Updated 2 years ago
- Open source FPGA-based NIC and platform for in-network compute☆200Updated last year
- The Artifact of NeoMem: Hardware/Software Co-Design for CXL-Native Memory Tiering☆57Updated last year