☆79Feb 5, 2022Updated 4 years ago
Alternatives and similar repositories for eth_vlg
Users that are interested in eth_vlg are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- System-Veilog Packet Library to configure, randomize, pack/unpack, copy, compare/display different headers☆81Mar 6, 2019Updated 7 years ago
- RTL implementation of the ethernet physical layer PCS for 10GBASE-R and 40GBASE-R.☆34Jan 2, 2024Updated 2 years ago
- 100 Gbps TCP/IP stack for Vitis shells☆230Apr 23, 2024Updated last year
- SystemVerilog extension for Visual Studio Code☆14Dec 18, 2018Updated 7 years ago
- Hardware design project of the FIX and TCP/IP offload engines on FPGA, containing HDL codes and Python codes for testing.☆21Dec 11, 2023Updated 2 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Verilog Ethernet components for FPGA implementation☆23Jun 26, 2023Updated 2 years ago
- USB Full-Speed/Hi-Speed Device Controller core for FPGA☆34Nov 23, 2020Updated 5 years ago
- ☆89May 4, 2017Updated 8 years ago
- APV21B - Real-time Video 16X Bicubic Super-resolution IP, AXI4-Stream Video Interface Compatible, 4K 60FPS☆29Mar 9, 2023Updated 3 years ago
- native Verilog pcap, littletoe, bcd, xml and hash modules, with Icarus testbenches☆46Nov 24, 2014Updated 11 years ago
- A Voila-Jones face detector hardware implementation☆33Nov 29, 2018Updated 7 years ago
- Scalable Network Stack for FPGAs (TCP/IP, RoCEv2)☆913Mar 27, 2026Updated 2 weeks ago
- ☆12Mar 27, 2024Updated 2 years ago
- FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations☆72Dec 17, 2025Updated 3 months ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- Direct Access Memory for MPSoC☆13Updated this week
- PNG encoder, implemented in VHDL☆23Mar 30, 2024Updated 2 years ago
- A versatile Wireshark-compatible packet filter, capable of 100G speeds and higher. Also known as FFShark☆50Jul 10, 2021Updated 4 years ago
- Verilog Ethernet components for FPGA implementation☆2,917Feb 27, 2025Updated last year
- HDL code for a complex multiplier with AXI stream Interface☆14Apr 6, 2023Updated 3 years ago
- NeTV2 SoC based on LiteX☆17Jul 17, 2018Updated 7 years ago
- Generic AXI interconnect fabric☆13Jul 17, 2014Updated 11 years ago
- IPs for data-plane integration of Hardware Processing Engines (HWPEs) within a PULP system☆21Jan 17, 2026Updated 2 months ago
- This linter plugin for SublimeLinter provides an interface to iverilog (verilog compiler).☆13Apr 16, 2024Updated last year
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- 10G Low Latency Ethernet☆103Jul 15, 2023Updated 2 years ago
- Computational Storage Device based on the open source project OpenSSD.☆31Oct 25, 2020Updated 5 years ago
- High-performance FPGA-based JPEG codec accelerator☆13Dec 1, 2018Updated 7 years ago
- ☆16Apr 21, 2022Updated 3 years ago
- Vivado design for basic NeTV2 FPGA with chroma-based overlay☆20Dec 24, 2016Updated 9 years ago
- FPGA raycaster engine written in verilog☆12Apr 19, 2019Updated 6 years ago
- Xilinx JTAG Toolchain on Digilent Arty board☆17Mar 15, 2018Updated 8 years ago
- Implementation of the pipelined RISC V processor with many useful features as fully bypassing, dynamic branch prediction, single and mult…☆18Feb 12, 2024Updated 2 years ago
- Open source FPGA-based NIC and platform for in-network compute☆2,261Jul 5, 2024Updated last year
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- SystemVerilog/Verilog support for vscode using Ctags☆37Sep 19, 2025Updated 6 months ago
- ☆13May 5, 2023Updated 2 years ago
- 10G Ethernet MAC implementation☆23Jul 13, 2020Updated 5 years ago
- ☆15Mar 28, 2026Updated 2 weeks ago
- ☆15Apr 12, 2018Updated 8 years ago
- AXI, AXI stream, Ethernet, and PCIe components in System Verilog☆704Apr 7, 2026Updated last week
- 10Gb Ethernet Switch☆262Oct 16, 2025Updated 5 months ago