Alternatives and similar repositories for xacc

Users that are interested in xacc are comparing it to the libraries listed below

• Blaok / tapa
  TAPA is a dataflow HLS framework that features fast compilation, expressive programming model and generates high-frequency FPGA accelerat…
  ☆19Updated 11 months ago
• MPSLab-ASU / dMazeRunner
  dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators
  ☆46Updated 3 years ago
• template-hls / template-hls-float
  ☆30Updated 6 years ago
• sfu-arch / SpGEMM
  ☆36Updated 4 years ago
• CMU-SAFARI / SPARTA
  A novel spatial accelerator for horizontal diffusion weather stencil computation, as described in ICS 2023 paper by Singh et al. (https:/…
  ☆22Updated 2 years ago
• Xilinx / ACCL
  Alveo Collective Communication Library: MPI-like communication operations for Xilinx Alveo accelerators
  ☆98Updated last month
• esa-tu-darmstadt / spn-compiler
  Multi-target compiler for Sum-Product Networks, based on MLIR and LLVM.
  ☆24Updated 8 months ago
• bespoke-silicon-group / bsg_bladerunner
  Meta-Repository for Bespoke Silicon Group's Manycore Architecture (A.K.A HammerBlade)
  ☆41Updated last month
• suchandler96 / gem5-NVDLA
  ☆33Updated 4 months ago
• fpgasystems / hacc
  ETHZ Heterogeneous Accelerated Compute Cluster.
  ☆36Updated 4 months ago
• PrincetonUniversity / MosaicSim
  Heterogeneous simulator for DECADES Project
  ☆32Updated last year
• Xilinx / xup_aie_training
  Hands-on experience programming AI Engines using Vitis Unified Software Platform
  ☆41Updated last year
• Xilinx / hydra
  ☆13Updated 3 years ago
• SFU-HiAccel / uBench
  [FPGA'21] Microbenchmarks for Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers
  ☆31Updated 3 years ago
• Xilinx / merlin-compiler
  ☆58Updated 2 years ago
• sstsimulator / sst-tutorials
  Tutorial Material from the SST Team
  ☆21Updated 2 months ago
• PolyArch / dsagen2
  Domain-Specific Architecture Generator 2
  ☆21Updated 2 years ago
• natu4u / GSOC_TensorCore
  TensorCore Vector Processor for Deep Learning - Google Summer of Code Project
  ☆22Updated 3 years ago
• kumasento / polsca
  Polyhedral High-Level Synthesis in MLIR
  ☆33Updated 2 years ago
• OSU-STARLAB / GPGPU-Ramulator-Simulator
  Replace original DRAM model in GPGPU-sim with Ramulator DRAM model
  ☆18Updated 6 years ago
• MPSLab-ASU / DiRAC
  Dynamically Reconfigurable Architecture Template and Cycle-level Microarchitecture Simulator for Dataflow AcCelerators
  ☆28Updated 2 years ago
• cwfletcher / buffets
  Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.
  ☆76Updated 6 years ago
• CMU-SAFARI / VAMPIRE
  An open-source DRAM power model based on extensive experimental characterization of real DRAM modules. Described in the SIGMETRICS 2018 …
  ☆39Updated 6 years ago
• CMU-SAFARI / PiDRAM
  PiDRAM is the first flexible end-to-end framework that enables system integration studies and evaluation of real Processing-using-Memory …
  ☆68Updated last year
• CastLab-KAIST / OpenMDS
  ☆14Updated 2 years ago
• google / open-chiplet
  ☆25Updated 4 years ago
• SFU-HiAccel / rodinia-hls
  FPGA version of Rodinia in HLS C/C++
  ☆38Updated 4 years ago
• yzwangfeng / reram-synthesis
  A synthesis flow for hybrid processing-in-RRAM modes
  ☆12Updated 4 years ago
• zslwyuan / PAAS_V1.0
  PAAS: A System Level Simulator for Heterogeneous (CPU-FPGA) Computing Systems
  ☆43Updated 3 years ago
• twaclaw / matmult
  A floating-point matrix multiplication implemented in hardware
  ☆31Updated 4 years ago