Alternatives and similar repositories for caribou

Users that are interested in caribou are comparing it to the libraries listed below

• pcie-bench / pciebench-netfpga
  pcie-bench code for NetFPGA/VCU709 cards
  ☆43Updated 7 years ago
• fpgasystems / Centaur
  Centaur, a framework for hybrid CPU-FPGA databases
  ☆27Updated 8 years ago
• fpgasystems / davos
  Distributed Accelerator OS
  ☆63Updated 3 years ago
• acsl-technion / ntl
  Networking Template Library for Vivado HLS
  ☆28Updated 5 years ago
• johan92 / fpga-hash-table
  Simple hash table on Verilog (SystemVerilog)
  ☆51Updated 9 years ago
• RSPwFPGAs / opae-xilinx
  OPAE porting to Xilinx FPGA devices.
  ☆39Updated 5 years ago
• p4fpga / p4fpga
  P4-14/16 Bluespec Compiler
  ☆89Updated 8 years ago
• sangwoojun / bluespecpcie
  PCIe library for the Xilinx 7 series FPGAs in the Bluespec language
  ☆82Updated 3 years ago
• chipsalliance / omnixtend
  OmniXtend cache coherence protocol
  ☆82Updated 7 months ago
• OPAE / intel-fpga-bbb
  Basic Building Blocks (BBB) for OPAE-managed Intel FPGAs
  ☆104Updated 11 months ago
• open-power / snap
  CAPI SNAP Framework Hardware and Software
  ☆110Updated 4 years ago
• OpenCAPI / oc-accel
  OpenCAPI Acceleration Framework: develop an accelerator with OpenCAPI technology
  ☆73Updated last year
• StanfordVLSI / Genesis2
  A home for Genesis2 sources.
  ☆44Updated 6 months ago
• tymonx / virtio
  Virtio implementation in SystemVerilog
  ☆48Updated 8 years ago
• firesim / firechip
  Top-Level Project for Firebox SoC, consisting of Rocket, BOOM, and peripherals (e.g. Ethernet NIC). This is the default target generator …
  ☆56Updated 6 years ago
• unihd-cag / openhmc
  openHMC - an open source Hybrid Memory Cube Controller
  ☆50Updated 9 years ago
• grg / parser-gen
  Network packet parser generator
  ☆53Updated 5 years ago
• cambridgehackers / connectal
  Connectal is a framework for software-driven hardware development.
  ☆176Updated 2 years ago
• pulp-platform / bigpulp
  ⛔ DEPRECATED ⛔ RISC-V manycore accelerator for HERO, bigPULP hardware platform
  ☆50Updated 4 years ago
• hpcn-uam / Limago
  Limago: an FPGA-based Open-source 100 GbE TCP/IP Stack
  ☆134Updated 4 years ago
• m-asiatici / MSHR-rich
  A multi-banked non-blocking cache that handles efficiently thousands of outstanding misses, especially suited for bandwidth-bound latency…
  ☆21Updated 5 years ago
• Xilinx / open-nic-driver
  AMD OpenNIC driver includes the Linux kernel driver
  ☆72Updated last year
• Xilinx / pcie_qdma_ats_example
  ☆27Updated 4 years ago
• lucasbrasilino / net2axis
  Verilog network module. Models network traffic from pcap to AXI-Stream
  ☆23Updated 4 years ago
• maswx / vu13p_corundum
  corundum work on vu13p
  ☆22Updated 2 years ago
• NetTLP / adapter
  An FPGA-based NetTLP adapter
  ☆26Updated 5 years ago
• alexforencich / verilog-cam
  Verilog Content Addressable Memory Module
  ☆115Updated 3 years ago
• maltanar / rosetta
  Rapidly deploy Chisel and Vivado HLS accelerators on Xilinx PYNQ
  ☆34Updated 7 years ago
• corundum / ethernet-switch
  Ethernet switch implementation written in Verilog
  ☆57Updated 2 years ago
• NetFPGA / NetFPGA-SUME-public
  NetFPGA-SUME public repository
  ☆113Updated 10 years ago