This repository contains IPs, Vitis kernels and software APIs that can be leveraged by Vitis users to build scale-out solutions on multiple Alveo cards.
☆25Apr 27, 2023Updated 3 years ago
Alternatives and similar repositories for AlveoLink
Users that are interested in AlveoLink are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Ready-to-link, packaged Aurora IP on four QSFP28 lanes, providing 100Gb/s throughput, flow control and status monitoring☆17Apr 26, 2026Updated last month
- Alveo Collective Communication Library: MPI-like communication operations for Xilinx Alveo accelerators☆104Jun 30, 2025Updated 11 months ago
- VNx: Vitis Network Examples☆160Aug 25, 2025Updated 9 months ago
- ☆18Jun 3, 2026Updated last week
- SHA-1,SHA-256,SHA-512 Secure Hash Generator written in VHDL(RTL) for FPGA(Xilinx and Altera).☆12Oct 14, 2017Updated 8 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- Framework providing operating system abstractions and a range of shared networking and memory services for common modern heterogeneous pl…☆402Jun 1, 2026Updated last week
- HW/SW co-designed end-host RPC stack☆20Oct 28, 2021Updated 4 years ago
- SYCL-based 2D Stencil Simulation Framework☆17May 3, 2026Updated last month
- A Scalable BFS Accelerator on FPGA-HBM Platform☆14Feb 22, 2024Updated 2 years ago
- Gaia DR3 has 6.6M quasar candidates! We construct a new quasar catalog for cosmology with them.☆10May 31, 2026Updated last week
- 100 Gbps TCP/IP stack for Vitis shells☆234Apr 23, 2024Updated 2 years ago
- Groundhog - Serial ATA Host Bus Adapter☆23Jun 10, 2018Updated 8 years ago
- ☆25May 9, 2019Updated 7 years ago
- A OpenCL-based FPGA benchmark suite for HPC☆37May 4, 2026Updated last month
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- The first version of TritonPart☆35Jan 2, 2024Updated 2 years ago
- A research shell for Alveo V80☆38Updated this week
- An accelerator to which you can offload RE matching☆14Dec 22, 2024Updated last year
- Distributed Accelerator OS☆68Apr 6, 2022Updated 4 years ago
- Yilong's NetFPGA-10G Repo☆13May 7, 2015Updated 11 years ago
- ☆21Jul 28, 2021Updated 4 years ago
- Controller for i2c EEPROM chip in Verilog for Mojo FPGA board☆27Mar 9, 2016Updated 10 years ago
- Userspace DMA library for Zynq-based SoCs☆16Jan 22, 2019Updated 7 years ago
- REAPR (Reconfigurable Engine for Automata Processing) is a general-purpose framework for accelerating automata processing applications su…☆16Jun 29, 2019Updated 6 years ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- Contains VHDL IP-blocks to create stand-alone RapidIO-endpoints, RapidIO-switches and RapidIO-switches with local endpoints.☆32Jun 8, 2017Updated 9 years ago
- RTL for mipi serialize and deserialize☆11Oct 16, 2017Updated 8 years ago
- Record MPI operations on tape☆25Dec 13, 2023Updated 2 years ago
- Reed-Solomon Coding with Interleaving , available as a C program and python module.☆10Jun 2, 2015Updated 11 years ago
- ☆12Aug 12, 2022Updated 3 years ago
- Vitis_Accel_Examples☆595Mar 30, 2026Updated 2 months ago
- For publishing the source for UG1352 "Get Moving with Alveo"☆51Jun 17, 2020Updated 5 years ago
- Provide / define the INPUT_CLK_HZ parameter and the BHG_FP_clk_divider.v will generate a clock at the specified CLK_OUT_HZ parameter usin…☆22Feb 4, 2025Updated last year
- A Programmable Hardware Architecture for Network Transport Logic☆37Oct 26, 2021Updated 4 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Tiny Tapeout GDS Action (using LibreLane)☆22Jun 2, 2026Updated last week
- MEEP FPGA Shell project, currently supporting Alveos u280 and u55c☆16Mar 14, 2024Updated 2 years ago
- Shuhai is a benchmarking-memory tool that allows FPGA programmers to demystify all the underlying details of memories, e.g., HBM and DDR4…☆118Jun 15, 2025Updated 11 months ago
- TinyTapeout demo pcb's RP2040 functionality☆23May 8, 2026Updated last month
- AMD Xilinx University Program Vivado tutorial☆49Feb 13, 2023Updated 3 years ago
- A terminal text editor written in MoonBit☆10Apr 7, 2025Updated last year
- Centaur, a framework for hybrid CPU-FPGA databases☆28May 2, 2017Updated 9 years ago