Alternatives and similar repositories for davos

Users that are interested in davos are comparing it to the libraries listed below

• Xilinx / open-nic-driver
  AMD OpenNIC driver includes the Linux kernel driver
  ☆67Updated 7 months ago
• hpcn-uam / 100G-fpga-network-stack-core
  This repo contains the Limago code
  ☆86Updated 2 months ago
• Xilinx / open-nic-shell
  AMD OpenNIC Shell includes the HDL source files
  ☆118Updated 7 months ago
• corundum / ethernet-switch
  Ethernet switch implementation written in Verilog
  ☆51Updated 2 years ago
• Xilinx / pcie_qdma_ats_example
  ☆25Updated 4 years ago
• alexforencich / verilog-cam
  Verilog Content Addressable Memory Module
  ☆107Updated 3 years ago
• Xilinx / HLS_packet_processing
  ☆47Updated 5 years ago
• Xilinx / xup_vitis_network_example
  VNx: Vitis Network Examples
  ☆151Updated last year
• hpcn-uam / Limago
  Limago: an FPGA-based Open-source 100 GbE TCP/IP Stack
  ☆127Updated 3 years ago
• alexforencich / corundum
  Open source FPGA-based NIC and platform for in-network compute
  ☆67Updated 9 months ago
• RSPwFPGAs / opae-xilinx
  OPAE porting to Xilinx FPGA devices.
  ☆39Updated 4 years ago
• ucsdsysnet / Rosebud
  Framework for FPGA-accelerated Middlebox Development
  ☆45Updated 2 years ago
• fpgasystems / Vitis_with_100Gbps_TCP-IP
  100 Gbps TCP/IP stack for Vitis shells
  ☆211Updated last year
• RSPwFPGAs / qemu-hdl-cosim
  VM-HDL Co-Simulation for Servers with PCIe-Connected FPGAs
  ☆48Updated 4 years ago
• corundum / verilog-pcie
  Verilog PCI express components
  ☆23Updated 2 years ago
• FPGA-Networking / Low-Cost-and-Programmable-CRC
  Source code of the paper "Low-Cost and Programmable CRC Implementation based on FPGA"
  ☆42Updated 4 years ago
• anan-cn / Open-Source-Network-on-Chip-Router-RTL
  ☆77Updated 10 years ago
• pgroupATusc / fasthash
  Source Code for the paper Titled FASTHash: FPGA-Based High Throughput Parallel Hash Table published in ISC high performance 2020
  ☆26Updated 3 years ago
• yhqiu16 / NVMeCHA
  NVMe Controller featuring Hardware Acceleration
  ☆90Updated 4 years ago
• lucasbrasilino / net2axis
  Verilog network module. Models network traffic from pcap to AXI-Stream
  ☆23Updated 4 years ago
• Xilinx / AlveoLink
  This repository contains IPs, Vitis kernels and software APIs that can be leveraged by Vitis users to build scale-out solutions on multip…
  ☆21Updated 2 years ago
• oprecomp / DDR4_controller
  ☆62Updated 4 years ago
• Xilinx / pcie-model
  PCI Express controller model
  ☆59Updated 2 years ago
• fpgadeveloper / ethernet-fmc-axi-eth
  Example design for the Ethernet FMC using 4 AXI Ethernet Subsystem IP blocks
  ☆66Updated 2 months ago
• mcjtag / tcam
  TCAM (Ternary Content-Addressable Memory) in Verilog
  ☆53Updated last year
• maswx / vu13p_corundum
  corundum work on vu13p
  ☆19Updated last year
• yu-zou / DirectNVM
  An open-source RTL NVMe controller IP for Xilinx FPGA.
  ☆53Updated 4 years ago
• Xilinx / RecoNIC
  RecoNIC is a software/hardware shell used to enable network-attached processing within an RDMA-featured SmartNIC for scale-out computing.
  ☆142Updated 4 months ago
• Xilinx / Alveo-PYNQ
  Introductory examples for using PYNQ with Alveo
  ☆51Updated 2 years ago
• johan92 / fpga-hash-table
  Simple hash table on Verilog (SystemVerilog)
  ☆49Updated 9 years ago