Alternatives and similar repositories for davos

Users that are interested in davos are comparing it to the libraries listed below

• Xilinx / pcie_qdma_ats_example
  ☆26Updated 4 years ago
• hpcn-uam / 100G-fpga-network-stack-core
  This repo contains the Limago code
  ☆87Updated 5 months ago
• Xilinx / open-nic-driver
  AMD OpenNIC driver includes the Linux kernel driver
  ☆69Updated 9 months ago
• alexforencich / verilog-cam
  Verilog Content Addressable Memory Module
  ☆114Updated 3 years ago
• corundum / ethernet-switch
  Ethernet switch implementation written in Verilog
  ☆54Updated 2 years ago
• Xilinx / open-nic-shell
  AMD OpenNIC Shell includes the HDL source files
  ☆127Updated 9 months ago
• Xilinx / HLS_packet_processing
  ☆48Updated 5 years ago
• alexforencich / corundum
  Open source FPGA-based NIC and platform for in-network compute
  ☆66Updated 2 months ago
• hpcn-uam / Limago
  Limago: an FPGA-based Open-source 100 GbE TCP/IP Stack
  ☆132Updated 4 years ago
• pgroupATusc / fasthash
  Source Code for the paper Titled FASTHash: FPGA-Based High Throughput Parallel Hash Table published in ISC high performance 2020
  ☆25Updated 3 years ago
• yu-zou / DirectNVM
  An open-source RTL NVMe controller IP for Xilinx FPGA.
  ☆56Updated 4 years ago
• Xilinx / xup_vitis_network_example
  VNx: Vitis Network Examples
  ☆154Updated 2 months ago
• yhqiu16 / NVMeCHA
  NVMe Controller featuring Hardware Acceleration
  ☆94Updated 4 years ago
• RSPwFPGAs / opae-xilinx
  OPAE porting to Xilinx FPGA devices.
  ☆39Updated 5 years ago
• oprecomp / DDR4_controller
  ☆67Updated 4 years ago
• FPGA-Networking / Low-Cost-and-Programmable-CRC
  Source code of the paper "Low-Cost and Programmable CRC Implementation based on FPGA"
  ☆43Updated 4 years ago
• lewiz-support / LMAC_CORE3
  Ethernet MAC IP Core for 100G/50G/40G/25G/10Gbps
  ☆45Updated 2 years ago
• lucasbrasilino / net2axis
  Verilog network module. Models network traffic from pcap to AXI-Stream
  ☆23Updated 4 years ago
• fpgasystems / Vitis_with_100Gbps_TCP-IP
  100 Gbps TCP/IP stack for Vitis shells
  ☆218Updated last year
• Xilinx / AlveoLink
  This repository contains IPs, Vitis kernels and software APIs that can be leveraged by Vitis users to build scale-out solutions on multip…
  ☆22Updated 2 years ago
• anan-cn / Open-Source-Network-on-Chip-Router-RTL
  ☆78Updated 11 years ago
• OpenCAPI / oc-accel
  OpenCAPI Acceleration Framework: develop an accelerator with OpenCAPI technology
  ☆72Updated last year
• ucsdsysnet / Rosebud
  Framework for FPGA-accelerated Middlebox Development
  ☆46Updated 2 years ago
• maswx / vu13p_corundum
  corundum work on vu13p
  ☆21Updated last year
• corundum / verilog-pcie
  Verilog PCI express components
  ☆24Updated 2 years ago
• pcie-bench / pciebench-netfpga
  pcie-bench code for NetFPGA/VCU709 cards
  ☆40Updated 7 years ago
• fpgadeveloper / ethernet-fmc-axi-eth
  Example design for the Ethernet FMC using 4 AXI Ethernet Subsystem IP blocks
  ☆65Updated 5 months ago
• Xilinx / AVED
  Alveo Versal Example Design
  ☆47Updated 2 weeks ago
• alexforencich / cocotbext-pcie
  PCI express simulation framework for Cocotb
  ☆179Updated last month
• mcjtag / tcam
  TCAM (Ternary Content-Addressable Memory) in Verilog
  ☆53Updated 2 years ago