Alternatives and similar repositories for ACCL

Users that are interested in ACCL are comparing it to the libraries listed below

• Xilinx / xup_aie_training
  Hands-on experience programming AI Engines using Vitis Unified Software Platform
  ☆41Updated last year
• OCT-FPGA / OCT-Tutorials
  ☆31Updated 2 months ago
• SFU-HiAccel / uBench
  [FPGA'21] Microbenchmarks for Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers
  ☆31Updated 3 years ago
• spcl / pspin
  PsPIN: A RISC-V in-network accelerator for flexible high-performance low-power packet processing
  ☆103Updated 2 years ago
• Xilinx / xacc
  Heterogeneous Accelerated Computed Cluster (HACC) Resources Page
  ☆21Updated this week
• cwfletcher / buffets
  Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.
  ☆76Updated 6 years ago
• fpgasystems / hacc
  ETHZ Heterogeneous Accelerated Compute Cluster.
  ☆36Updated 4 months ago
• CMU-SAFARI / PiDRAM
  PiDRAM is the first flexible end-to-end framework that enables system integration studies and evaluation of real Processing-using-Memory …
  ☆68Updated last year
• cornell-zhang / HiSparse
  High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS
  ☆94Updated 10 months ago
• TeCSAR-UNCC / gem5-SALAM
  ☆92Updated last year
• sstsimulator / sst-elements
  SST Architectural Simulation Components and Libraries
  ☆96Updated last week
• Xilinx / mlir-air
  ☆103Updated last week
• PrincetonUniversity / accelerator-wall
  Repository for the tools and non-commercial data used for the "Accelerator wall" paper.
  ☆51Updated 6 years ago
• miglopst / PIM_NDP_papers
  ☆65Updated 4 years ago
• RC4ML / Shuhai
  Shuhai is a benchmarking-memory tool that allows FPGA programmers to demystify all the underlying details of memories, e.g., HBM and DDR4…
  ☆112Updated last month
• Xilinx / merlin-compiler
  ☆58Updated 2 years ago
• Xilinx / xup_vitis_network_example
  VNx: Vitis Network Examples
  ☆151Updated last year
• cornell-zhang / rosetta
  Rosetta: A Realistic High-level Synthesis Benchmark Suite for Software Programmable FPGAs
  ☆166Updated last year
• Xilinx / Get_Moving_With_Alveo
  For publishing the source for UG1352 "Get Moving with Alveo"
  ☆51Updated 5 years ago
• zslwyuan / PAAS_V1.0
  PAAS: A System Level Simulator for Heterogeneous (CPU-FPGA) Computing Systems
  ☆43Updated 3 years ago
• fpgasystems / Coyote
  Framework providing operating system abstractions and a range of shared networking and memory services for common modern heterogeneous pl…
  ☆277Updated this week
• tukl-msd / DRAMPower
  Fast and accurate DRAM power and energy estimation tool
  ☆168Updated last week
• esl-epfl / gem5-X
  The gem5-X open source framework (based on the gem5 simulator)
  ☆41Updated 2 years ago
• RC4ML / FpgaNIC
  FpgaNIC is an FPGA-based Versatile 100Gb SmartNIC for GPUs [ATC 22]
  ☆131Updated last year
• KastnerRG / spector
  Spector: An OpenCL FPGA Benchmark Suite
  ☆48Updated 6 years ago
• cucapra / EventQueue
  EQueue Dialect
  ☆40Updated 3 years ago
• gthparch / HBM
  High Bandwidth Memory (HBM) timing model based on DRAMSim2
  ☆42Updated 8 years ago
• esa-tu-darmstadt / spn-compiler
  Multi-target compiler for Sum-Product Networks, based on MLIR and LLVM.
  ☆24Updated 8 months ago
• sstsimulator / sst-core
  SST Structural Simulation Toolkit Parallel Discrete Event Core and Services
  ☆168Updated last week
• CMU-SAFARI / SparseP
  SparseP is the first open-source Sparse Matrix Vector Multiplication (SpMV) software package for real-world Processing-In-Memory (PIM) ar…
  ☆75Updated 3 years ago