Xilinx / ACCLLinks
Alveo Collective Communication Library: MPI-like communication operations for Xilinx Alveo accelerators
☆97Updated last month
Alternatives and similar repositories for ACCL
Users that are interested in ACCL are comparing it to the libraries listed below
Sorting:
- Hands-on experience programming AI Engines using Vitis Unified Software Platform☆41Updated last year
- PsPIN: A RISC-V in-network accelerator for flexible high-performance low-power packet processing☆103Updated 2 years ago
- ETHZ Heterogeneous Accelerated Compute Cluster.☆36Updated 5 months ago
- [FPGA'21] Microbenchmarks for Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers☆31Updated 3 years ago
- ☆31Updated 2 months ago
- Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.☆77Updated 6 years ago
- PiDRAM is the first flexible end-to-end framework that enables system integration studies and evaluation of real Processing-using-Memory …☆69Updated last year
- Shuhai is a benchmarking-memory tool that allows FPGA programmers to demystify all the underlying details of memories, e.g., HBM and DDR4…☆114Updated 2 months ago
- Heterogeneous Accelerated Computed Cluster (HACC) Resources Page☆22Updated 3 weeks ago
- Framework providing operating system abstractions and a range of shared networking and memory services for common modern heterogeneous pl…☆279Updated 3 weeks ago
- The gem5-X open source framework (based on the gem5 simulator)☆41Updated 2 years ago
- PAAS: A System Level Simulator for Heterogeneous (CPU-FPGA) Computing Systems☆43Updated 3 years ago
- VNx: Vitis Network Examples☆152Updated last year
- For publishing the source for UG1352 "Get Moving with Alveo"☆50Updated 5 years ago
- FpgaNIC is an FPGA-based Versatile 100Gb SmartNIC for GPUs [ATC 22]☆131Updated 2 years ago
- SST Architectural Simulation Components and Libraries☆98Updated last week
- Rosetta: A Realistic High-level Synthesis Benchmark Suite for Software Programmable FPGAs☆167Updated last year
- High Bandwidth Memory (HBM) timing model based on DRAMSim2☆42Updated 8 years ago
- ☆65Updated 4 years ago
- High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS☆95Updated 11 months ago
- ☆92Updated last year
- Benchmarks for Accelerator Design and Customized Architectures☆129Updated 5 years ago
- ☆58Updated 2 years ago
- Processing in Memory Emulation☆21Updated 2 years ago
- Heterogeneous Research Platform (HERO) for exploration of heterogeneous computers consisting of programmable many-core accelerators and a…☆111Updated last year
- HLS-based Graph Processing Framework on FPGAs☆148Updated 2 years ago
- Repository for the tools and non-commercial data used for the "Accelerator wall" paper.☆51Updated 6 years ago
- RapidStream TAPA compiles task-parallel HLS program into high-frequency FPGA accelerators.☆174Updated last week
- Simulator framework for analysis of performance, energy consumption, area and cost of multi-node multi-chiplet tile-based manycore design…☆68Updated last year
- ☆30Updated 6 years ago