Alternatives and similar repositories for Coyote

Users that are interested in Coyote are comparing it to the libraries listed below

• Xilinx / xup_vitis_network_example
  VNx: Vitis Network Examples
  ☆154Updated last month
• Xilinx / open-nic
  AMD OpenNIC Project Overview
  ☆284Updated 2 years ago
• fpgasystems / Vitis_with_100Gbps_TCP-IP
  100 Gbps TCP/IP stack for Vitis shells
  ☆219Updated last year
• Xilinx / RecoNIC
  RecoNIC is a software/hardware shell used to enable network-attached processing within an RDMA-featured SmartNIC for scale-out computing.
  ☆146Updated 6 months ago
• Xilinx / open-nic-shell
  AMD OpenNIC Shell includes the HDL source files
  ☆127Updated 9 months ago
• hpcn-uam / Limago
  Limago: an FPGA-based Open-source 100 GbE TCP/IP Stack
  ☆132Updated 4 years ago
• Xilinx / open-nic-driver
  AMD OpenNIC driver includes the Linux kernel driver
  ☆69Updated 9 months ago
• ucsdsysnet / corundum
  Open source FPGA-based NIC and platform for in-network compute
  ☆198Updated last year
• tukl-msd / DRAMSys
  DRAMSys a SystemC TLM-2.0 based DRAM simulator.
  ☆306Updated 2 weeks ago
• lastweek / fpga_readings
  Recipe for FPGA cooking
  ☆305Updated last year
• spcl / pspin
  PsPIN: A RISC-V in-network accelerator for flexible high-performance low-power packet processing
  ☆104Updated 2 years ago
• Xilinx / Get_Moving_With_Alveo
  For publishing the source for UG1352 "Get Moving with Alveo"
  ☆50Updated 5 years ago
• definelicht / hlslib
  A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.
  ☆328Updated 8 months ago
• hpcn-uam / 100G-fpga-network-stack-core
  This repo contains the Limago code
  ☆87Updated 4 months ago
• RC4ML / Shuhai
  Shuhai is a benchmarking-memory tool that allows FPGA programmers to demystify all the underlying details of memories, e.g., HBM and DDR4…
  ☆117Updated 3 months ago
• Xilinx / ACCL
  Alveo Collective Communication Library: MPI-like communication operations for Xilinx Alveo accelerators
  ☆97Updated 3 months ago
• booksim / booksim2
  BookSim 2.0
  ☆368Updated last year
• HewlettPackard / mcpat
  An integrated power, area, and timing modeling framework for multicore and manycore architectures
  ☆197Updated 5 years ago
• NVlabs / matchlib
  SystemC/C++ library of commonly-used hardware functions and components for HLS.
  ☆282Updated 2 weeks ago
• sld-columbia / esp
  Embedded Scalable Platforms: Heterogeneous SoC architecture and IP integration made easy
  ☆384Updated 2 months ago
• ucsdsysnet / Rosebud
  Framework for FPGA-accelerated Middlebox Development
  ☆46Updated 2 years ago
• umd-memsys / DRAMsim3
  DRAMsim3: a Cycle-accurate, Thermal-Capable DRAM Simulator
  ☆411Updated last year
• tukl-msd / DRAMPower
  Fast and accurate DRAM power and energy estimation tool
  ☆178Updated this week
• RC4ML / FpgaNIC
  FpgaNIC is an FPGA-based Versatile 100Gb SmartNIC for GPUs [ATC 22]
  ☆132Updated 2 years ago
• Xilinx / SDAccel-Tutorials
  SDAccel Development Environment Tutorials
  ☆111Updated 5 years ago
• sparcians / map
  Modeling Architectural Platform
  ☆206Updated this week
• esa-tu-darmstadt / tapasco
  The Task Parallel System Composer (TaPaSCo)
  ☆111Updated 4 months ago
• ucb-bar / constellation
  A Chisel RTL generator for network-on-chip interconnects
  ☆211Updated last month
• tuna / tapa
  TAPA compiles task-parallel HLS program into high-performance FPGA accelerators.
  ☆174Updated last month
• OPAE / intel-fpga-bbb
  Basic Building Blocks (BBB) for OPAE-managed Intel FPGAs
  ☆104Updated 8 months ago