fpgasystems / CoyoteLinks
Framework providing operating system abstractions and a range of shared networking and memory services for common modern heterogeneous platforms.
☆309Updated this week
Alternatives and similar repositories for Coyote
Users that are interested in Coyote are comparing it to the libraries listed below
Sorting:
- VNx: Vitis Network Examples☆155Updated 2 months ago
- AMD OpenNIC Project Overview☆288Updated 2 years ago
- AMD OpenNIC Shell includes the HDL source files☆132Updated 10 months ago
- 100 Gbps TCP/IP stack for Vitis shells☆223Updated last year
- RecoNIC is a software/hardware shell used to enable network-attached processing within an RDMA-featured SmartNIC for scale-out computing.☆151Updated 7 months ago
- Limago: an FPGA-based Open-source 100 GbE TCP/IP Stack☆133Updated 4 years ago
- AMD OpenNIC driver includes the Linux kernel driver☆70Updated 10 months ago
- Open source FPGA-based NIC and platform for in-network compute☆200Updated last year
- This repo contains the Limago code☆89Updated 6 months ago
- PsPIN: A RISC-V in-network accelerator for flexible high-performance low-power packet processing☆103Updated 2 years ago
- For publishing the source for UG1352 "Get Moving with Alveo"☆50Updated 5 years ago
- DRAMSys a SystemC TLM-2.0 based DRAM simulator.☆317Updated last month
- Framework for FPGA-accelerated Middlebox Development☆48Updated 2 years ago
- A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.☆331Updated 9 months ago
- Shuhai is a benchmarking-memory tool that allows FPGA programmers to demystify all the underlying details of memories, e.g., HBM and DDR4…☆117Updated 5 months ago
- Recipe for FPGA cooking☆306Updated last year
- SDAccel Development Environment Tutorials☆110Updated 5 years ago
- BookSim 2.0☆380Updated last year
- Distributed Accelerator OS☆64Updated 3 years ago
- Heterogeneous Research Platform (HERO) for exploration of heterogeneous computers consisting of programmable many-core accelerators and a…☆112Updated 2 years ago
- A Chisel RTL generator for network-on-chip interconnects☆221Updated last week
- ☆26Updated 4 years ago
- Embedded Scalable Platforms: Heterogeneous SoC architecture and IP integration made easy☆391Updated 3 weeks ago
- Alveo Collective Communication Library: MPI-like communication operations for Xilinx Alveo accelerators☆97Updated 4 months ago
- SystemC/C++ library of commonly-used hardware functions and components for HLS.☆286Updated 2 weeks ago
- Basic Building Blocks (BBB) for OPAE-managed Intel FPGAs☆104Updated 9 months ago
- TAPA compiles task-parallel HLS program into high-performance FPGA accelerators.☆175Updated 3 months ago
- A Fast, Low-Overhead On-chip Network☆232Updated 2 weeks ago
- OpenCGRA is an open-source framework for modeling, testing, and evaluating CGRAs.☆161Updated 2 years ago
- Example RISC-V Out-of-Order/Superscalar Processor Performance Core and MSS Model☆190Updated this week