Alternatives and similar repositories for hXDP-Artifacts:

Users that are interested in hXDP-Artifacts are comparing it to the libraries listed below

• pcie-bench / pcie-model
  ☆62Updated last month
• minmit / tonic
  A Programmable Hardware Architecture for Network Transport Logic
  ☆34Updated 3 years ago
• acsl-technion / nica
  An infrastructure for inline acceleration of network applications
  ☆30Updated 3 years ago
• axbryd / FlowBlaze
  FlowBlaze: Stateful Packet Processing in Hardware
  ☆68Updated 2 years ago
• programmable-scheduling / pifo-hardware
  ☆30Updated 9 years ago
• axbryd / warp-artifacts
  Artifacts for ATC '22 paper "Faster Software Packet Processing on FPGA NICs with eBPF Program Warping"
  ☆17Updated 2 years ago
• multitenancy-project / menshen
  ☆45Updated 2 years ago
• tcp-acceleration-service / FlexTOE
  Flexible, high-performance TCP offload to SmartNICs using fine-grained parallelism
  ☆56Updated 3 years ago
• acceltcp / AccelTCP
  A user-level TCP/IP stack with NIC offload of stateful TCP operations
  ☆70Updated 4 years ago
• l-nic / chipyard
  An Agile Chisel-Based SoC Design Framework
  ☆26Updated 3 years ago
• spcl / pspin
  PsPIN: A RISC-V in-network accelerator for flexible high-performance low-power packet processing
  ☆101Updated 2 years ago
• vishal1303 / PIEO-Scheduler
  A Fast, Scalable and Programmable Packet Scheduler in Hardware
  ☆38Updated 5 years ago
• ucsdsysnet / Rosebud
  Framework for FPGA-accelerated Middlebox Development
  ☆43Updated 2 years ago
• NetFPGA / NetFPGA-PLUS
  ☆51Updated 8 months ago
• p4fpga / p4fpga
  P4-14/16 Bluespec Compiler
  ☆84Updated 7 years ago
• agsiddharth / CAL-DPDK-GEM5
  Modifications to GEM5 for running kernel bypass networking. (DPDK)
  ☆15Updated last year
• crossroadsfpga / enso
  Ensō is a high-performance streaming interface for NIC-application communication.
  ☆71Updated last week
• NetSys / irn-vivado-hls
  IRN's packet processing logic synthesized using Xilinx Vivado HLS
  ☆23Updated 6 years ago
• Xilinx / RecoNIC
  RecoNIC is a software/hardware shell used to enable network-attached processing within an RDMA-featured SmartNIC for scale-out computing.
  ☆121Updated 2 weeks ago
• WukLab / Clio
  Clio, ASPLOS'22.
  ☆73Updated 3 years ago
• Terabit-Ethernet / NetChannel
  ☆42Updated 8 months ago
• utnslab / RingleaderNIC
  ☆14Updated last year
• bestephe / loom
  The code for both the framework and experiments from the NSDI '19 paper "Loom: Flexible and Efficient NIC Packet Scheduling"
  ☆30Updated 6 years ago
• host-bench / husky
  Benchmark Suite for RDMA Performance Isolation
  ☆37Updated last year
• host-bench / rdma-bench
  Benchmark Test Suite for RDMA Networks
  ☆53Updated last year
• esnet / esnet-smartnic-hw
  ESnet SmartNIC hardware design repository.
  ☆48Updated this week
• ETH-PLUS / Jingzhao
  ☆47Updated 5 months ago
• HKUST-SING / srnic-simulation-public
  ☆18Updated 2 years ago
• NetFPGA / P4-NetFPGA-public
  P4-NetFPGA wiki
  ☆103Updated 7 years ago
• spcl / redmark
  ReDMArk: Bypassing RDMA Security Mechanisms.
  ☆39Updated 4 years ago