chipsalliance / rocket-toolsLinks
Software tools that support rocket-chip (GNU toolchain, ISA simulator, tests)
☆59Updated 2 years ago
Alternatives and similar repositories for rocket-tools
Users that are interested in rocket-tools are comparing it to the libraries listed below
Sorting:
- Basic floating-point components for RISC-V processors☆67Updated 6 years ago
- Setup scripts and files needed to compile CoreMark on RISC-V☆72Updated last year
- A modular, parametrizable, and highly flexible Data Movement Accelerator (DMA)☆189Updated 3 months ago
- AXI Adapter(s) for RISC-V Atomic Operations☆66Updated last week
- Chisel Learning Journey☆111Updated 2 years ago
- Vector processor for RISC-V vector ISA☆133Updated 5 years ago
- ☆190Updated 2 years ago
- A Style Guide for the Chisel Hardware Construction Language☆108Updated 4 years ago
- Wrapper for Rocket-Chip on FPGAs☆138Updated 3 years ago
- Open-source high-performance non-blocking cache☆92Updated 3 weeks ago
- Generic Register Interface (contains various adapters)☆134Updated last month
- RiftCore is a 9-stage, single-issue, out-of-order 64-bits RISC-V Core, which supports RV64IMC and 3-level Cache System☆44Updated 3 years ago
- Provides various testers for chisel users☆100Updated 2 years ago
- The multi-core cluster of a PULP system.☆109Updated last month
- Heterogeneous Research Platform (HERO) for exploration of heterogeneous computers consisting of programmable many-core accelerators and a…☆114Updated 2 years ago
- Open source high performance IEEE-754 floating unit☆87Updated last year
- ☆82Updated last year
- RISC-V Verification Interface☆132Updated 2 weeks ago
- ☆89Updated 4 months ago
- RISC-V Torture Test☆204Updated last year
- (System)Verilog to Chisel translator☆117Updated 3 years ago
- Provides dot visualizations of chisel/firrtl circuits☆122Updated 2 years ago
- Technology dependent cells instantiated in the design for generic process (simulation, FPGA)☆75Updated last month
- RISC-V System on Chip Template☆159Updated 4 months ago
- Port fpga-zynq (rocket-chip) to Xilinx ZYNQ Ultrascale+ board (ZCU102)☆64Updated 2 years ago
- SSRV(Super-Scalar RISC-V) --- Super-scalar out-of-order RV32IMC CPU core, 6.4 CoreMark/MHz.☆221Updated 5 years ago
- A RISC-V Core (RV32I) written in Chisel HDL☆105Updated last month
- ☆99Updated 4 months ago
- XiangShan Frontend Develop Environment☆68Updated last week
- An Open-Source Design and Verification Environment for RISC-V☆86Updated 4 years ago