adamsolomou / SC-DNN
Stochastic Computing for Deep Neural Networks
☆33Updated 4 years ago
Alternatives and similar repositories for SC-DNN
Users that are interested in SC-DNN are comparing it to the libraries listed below
Sorting:
- Hardware implementation of Spiking Neural Network on a PYNQ-Z1 board☆36Updated 5 years ago
- Benchmark framework of compute-in-memory based accelerators for deep neural network (on-chip training chip focused)☆48Updated 3 years ago
- ☆11Updated 5 years ago
- ☆15Updated last year
- The CyNAPSE Neuromorphic Accelerator: A Digital Spiking neural network accelerator written in fully synthesizable verilog HDL☆33Updated 5 years ago
- ☆17Updated 4 years ago
- Benchmark framework of compute-in-memory based accelerators for deep neural network (inference engine focused)☆65Updated 2 months ago
- Benchmark framework of compute-in-memory based accelerators for deep neural network☆42Updated 4 years ago
- ReckOn: A Spiking RNN Processor Enabling On-Chip Learning over Second-Long Timescales - HDL source code and documentation.☆84Updated 3 years ago
- Fully Hardware-Based Stochastic Neural Network☆21Updated 3 months ago
- Models and training scripts for "LSTMs for Keyword Spotting with ReRAM-based Compute-In-Memory Architectures" (ISCAS 2021).☆15Updated 4 years ago
- The project includes SRAM In Memory Computing Accelerator with updates in design/circuits submitted previously in MPW7, by IITD researche…☆11Updated 2 years ago
- tinyODIN digital spiking neural network (SNN) processor - HDL source code and documentation.☆56Updated 2 years ago
- ☆18Updated 4 years ago
- Fast Emulation of Approximate DNN Accelerators in PyTorch☆22Updated last year
- ☆15Updated 2 years ago
- A Unified Framework for Training, Mapping and Simulation of ReRAM-Based Convolutional Neural Network Acceleration☆34Updated 2 years ago
- Framework for radix encoded SNN on FPGA☆12Updated 3 years ago
- Benchmark framework of 3D integrated CIM accelerators for popular DNN inference, support both monolithic and heterogeneous 3D integration☆22Updated 3 years ago
- [FPL 2021] SyncNN: Evaluating and Accelerating Spiking Neural Networks on FPGAs.☆55Updated 3 years ago
- ReRAM implementation on CNN☆18Updated 6 years ago
- LoAS: Fully Temporal-Parallel Dataflow for Dual-Sparse Spiking Neural Networks, MICRO 2024.☆10Updated last month
- CORDIC-SNN, followed with "Unsupervised learning of digital recognition using STDP" published in 2015, frontiers☆23Updated 5 years ago
- FracBNN: Accurate and FPGA-Efficient Binary Neural Networks with Fractional Activations☆93Updated 3 years ago
- C++ code for HLS FPGA implementation of transformer☆16Updated 8 months ago
- Neural Network-Hardware Co-design for Scalable RRAM-based BNN Accelerators☆11Updated 6 years ago
- [TCAD'24] This repository contains the source code for the paper "FireFly v2: Advancing Hardware Support for High-Performance Spiking Neu…☆18Updated last year
- A collection of research papers on SRAM-based compute-in-memory architectures.☆28Updated last year
- Neural Network Evaluation Tool on Crossbar-based Accelerator with Resistive Memory☆40Updated 5 years ago
- Spiking Neural Network Accelerator☆15Updated 3 years ago